[LLVMbugs] [Bug 12869] New: performance oportunity for CG with instruction reordering

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Fri May 18 07:03:43 PDT 2012


http://llvm.org/bugs/show_bug.cgi?id=12869

             Bug #: 12869
           Summary: performance oportunity for CG with instruction
                    reordering
           Product: new-bugs
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: new bugs
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: kcc at google.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


Here are two semantically equivalent functions. 
LLVM x86 CG produces 2 instructions for function one and 4 for another. 


void foo(int * restrict x, int * restrict y) {
  int tx = *x;
  int ty = *y;
  tx = tx >> 10;
  ty = ty >> 10;
  *x = tx;
  *y = ty;
}

void bar(int * restrict x, int * restrict y) {
  *x = *x >> 10;
  *y = *y >> 10;
}


; ModuleID = 'tt.c'
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"

define void @foo(i32* nocapture noalias  %A1, i32* nocapture noalias %A2)
nounwind uwtable {
entry:
  %L1 = load i32* %A1, align 4
  %L2 = load i32* %A2, align 4
  %S1  = ashr i32 %L1, 10
  %S2  = ashr i32 %L2, 10
  store i32 %S1, i32* %A1, align 4
  store i32 %S2, i32* %A2, align 4
  ret void
}

define void @bar(i32* nocapture noalias  %A1, i32* nocapture noalias %A2)
nounwind uwtable {
entry:
  %L1 = load i32* %A1, align 4
  %S1  = ashr i32 %L1, 10
  store i32 %S1, i32* %A1, align 4
  %L2 = load i32* %A2, align 4
  %S2  = ashr i32 %L2, 10
  store i32 %S2, i32* %A2, align 4
  ret void
}


First: 
        sarl    $10, (%rdi)
        sarl    $10, (%rsi)
Second:
        movl    (%rsi), %eax
        sarl    $10, (%rdi)
        sarl    $10, %eax
        movl    %eax, (%rsi)

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