[LLVMbugs] [Bug 12732] New: [llvm-mc] Incorrect disassembly of x86 (OP: A1) MOV EAX, moffs32*

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=12732

             Bug #: 12732
           Summary: [llvm-mc] Incorrect disassembly of x86 (OP: A1) MOV
                    EAX, moffs32*
           Product: tools
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: llvm-dis
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: anthony.louis.eden at gmail.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


Command:
echo "0xA1 0x00 0x30 0x00 0x10" | ./Debug+Asserts/bin/llvm-mc -arch=x86
-disassemble

Output:
.section        __TEXT,__text,regular,pure_instructions
movl    268447744, %eax

The output should be something like (from ollydbg, intel syntax):
10001009  |. A1 00300010    MOV EAX,DWORD PTR DS:[__security_cookie]

See MOV in the instruction set reference of the Intel 64 and IA-32
Architectures Software Developer's Manual:

Opcode | Instruction      | Op/En | 64Bit Mode |  Compat/Leg Mode | Description
A1       MOV EAX,moffs32*   FD       Valid        Valid             Move
doubleword at (seg:offset) to EAX.

* The moffs8, moffs16, moffs32 and moffs64 operands specify a simple offset
relative to the
  segment base, where 8, 16, 32 and 64 refer to the size of the data. The
address-size attribute
  of the instruction determines the size of the offset, either 16, 32 or 64
bits.

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