[LLVMbugs] [Bug 10700] [x86 disassembler] arpl should not be possible with 64-bit target

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=10700

Kay Tiong Khoo <kkhoo at perfwizard.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|                            |FIXED

--- Comment #6 from Kay Tiong Khoo <kkhoo at perfwizard.com> 2012-03-01 12:25:25 CST ---
Testing with r151510:
$ echo '0x63 0xc0' | ./llvm-mc -disassemble -triple=x86_64 <stdin>:1:1:
warning: invalid instruction encoding
0x63 0xc0
^
<stdin>:1:6: warning: invalid instruction encoding
0x63 0xc0
     ^
$ echo '0x48 0x63 0xc0' | ./llvm-mc -disassemble -triple=x86_64 
    movslq    %eax, %rax
$ echo '0x48 0x63 0xc0' | ./llvm-mc -disassemble -triple=x86_64
-x86-asm-syntax=intel
    movsxd    RAX, EAX


So yes, Intel is discouraging the 32-bit (no REX prefix) variant since it's a
copy of another instruction, except in this case it would have a misleading
mnemonic. AMD doesn't seem to care. I guess this is good enough.

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