[LLVMbugs] [Bug 13219] New: debugging mode, where undef's are filled with randoms

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=13219

             Bug #: 13219
           Summary: debugging mode, where undef's are filled with randoms
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Target-Independent JIT
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: llvm at henning-thielemann.de
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


I like to have a way in the JIT mode to fill undef registers with random values
for debugging purposes.

Reason is that I discovered a bug where I accidentally swapped the first two
operands in 'roundss undef, %vectorreg, %mode' on X86. This worked reliably in
the test cases because 'undef' was always aliased with the register for
%vectorreg. But in some circumstances this was not the case. Filling 'undef'
registers with random values in a debugging mode would help a lot to spot such
bugs.

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