[LLVMbugs] [Bug 13138] New: ARM Assembler does not support syntax for implementation defined DSB instructions

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=13138

             Bug #: 13138
           Summary: ARM Assembler does not support syntax for
                    implementation defined DSB instructions
           Product: libraries
           Version: trunk
          Platform: All
        OS/Version: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: ARM
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: richard.barton at arm.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


The DSB (Data Synchronization Barrier) instruction ensures the completion of
memory accesses and has assembly syntax:

DSB{<c>}{<q>}  {<option>}

Where the optional <option> value can impose a limitation on the types of
memory accesses effected. There are a number of proscribed assembly strings for
this option, the default is "SY"

The ARMARM says the following about this value:

"All other encodings of option are reserved. It is implementation defined
whether options other than SY are implemented. All unsupported and reserved
options must execute as a full system DSB operation, but software must not rely
on this behavior."

Currently, the MC Assembler does not have any syntax for the reserved option
values. GNU recognises "DSB 0x0" for example as the reserved option value 0.
The ARM assembler in MC throws a syntax error on this instruction.

In addition, all encodings of this instruction with any of bits 12:19 unset or
any of the bits 8:11 set is UNPREDICTABLE. The MC decoder does not recognise
this.

Reproduce with:

echo "DSB #0x1" | .../llvm-mc -triple armv7 -show-inst -show-encoding
echo "0x4f 0xf0 0x7e 0xfa | .../llvm-mc -triple armv7 -disassemble -show-isnt
-show-encoding

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