[LLVMbugs] [Bug 13036] New: Thumb FSTMX/FLDMX instructions are not supported
bugzilla-daemon at llvm.org
bugzilla-daemon at llvm.org
Wed Jun 6 03:56:13 PDT 2012
http://llvm.org/bugs/show_bug.cgi?id=13036
Bug #: 13036
Summary: Thumb FSTMX/FLDMX instructions are not supported
Product: libraries
Version: trunk
Platform: All
OS/Version: All
Status: NEW
Severity: normal
Priority: P
Component: Backend: ARM
AssignedTo: unassignedbugs at nondot.org
ReportedBy: richard.barton at arm.com
CC: llvmbugs at cs.uiuc.edu
Classification: Unclassified
The Thumb backend does not support the FLDMX/FSTMX instructions.
These instructions are a bit of a curiosity in that they are pre-ARMv6 (VFPv1)
instruction mnemonics which were not superseded by UAL-style V* mnemonics. They
still exist in VFPv4 (ARMv7) but their use is deprecated. Any VSTM/VLDM's with
odd numbered 'imm8' fields (bottom 8 bits) are the old-style F* encodings, and
the encoding for the immediate is different.
Reproduce with: echo 0x80 0xec 0x03 0x0b |
/work/ricbar01/llvm-oss/build/bin/llvm-mc -triple thumbv7 -show-inst
-show-encoding -disassemble
.section __TEXT,__text,regular,pure_instructions
vstmia r0, {d0} @ encoding: [0x80,0xec,0x02,0x0b]
@ <MCInst #2086 VSTMDIA
@ <MCOperand Reg:60>
@ <MCOperand Imm:14>
@ <MCOperand Reg:0>
@ <MCOperand Reg:3>>
These instructions are completely unsupported, so the symptoms are not always
to decode a VSTM. e.g.
echo 0x80 0xec 0x01 0x0b | /work/ricbar01/llvm-oss/build/bin/llvm-mc -triple
thumbv7 -show-inst -show-encoding -disassemble
.section __TEXT,__text,regular,pure_instructions
<stdin>:1:1: warning: invalid instruction encoding
0x80 0xec 0x01 0x0b
^
lsls r4, r5, #7 @ encoding: [0xec,0x01]
@ <MCInst #2644 tLSLri
@ <MCOperand Reg:64>
@ <MCOperand Reg:2>
@ <MCOperand Reg:65>
@ <MCOperand Imm:7>
@ <MCOperand Imm:14>
@ <MCOperand Reg:0>>
<stdin>:1:16: warning: invalid instruction encoding
0x80 0xec 0x01 0x0b
^
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