[LLVMbugs] [Bug 13007] New: ARM CodeGen fails with large stack alignment

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=13007

             Bug #: 13007
           Summary: ARM CodeGen fails with large stack alignment
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: ARM
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: eugeni.stepanov at gmail.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


LLVM on ARM fails to allocate a stack temp with a large alignment.

# cat 1.ll
target datalayout =
"e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:32-n32-S64"
target triple = "thumbv4t--linux-androideabi"

define i32 @main() nounwind {
entry:
  %x = alloca i32, align 512
  store volatile i32 0, i32* %x, align 512
  ret i32 0
}

# clang++ -target arm-linux-androideabi -mthumb -O2  -S  1.ll -o -
[...]
    push    {r4, lr}
    sub    sp, #508
    sub    sp, #508
    mov    r1, sp
    movs    r0, #0
    str    r0, [r1]
    add    sp, #508
    add    sp, #508
    pop    {r4, pc}
[...]

The above does not make any sense to me, but I'm pretty sure there is nothing
to align the stack there.

Adding -march=armv7-a makes thing slightly better:

# clang++ -target arm-linux-androideabi -mthumb -march=armv7-a -O2  -S  1.ll -o
-
[...]
    push.w    {r4, r7, r11, lr}
    add    r7, sp, #4
    sub    sp, #496
    mov    r4, sp
    bic    r4, r4, #511
    mov    sp, r4
    movs    r0, #0
    subs    r4, r7, #4
    str    r0, [sp]
    movs    r0, #0
    mov    sp, r4
    pop.w    {r4, r7, r11, pc}
[...]

This does not really work, either: 511 is too large for a BIC immediate.

/tmp/1-RUn2xF.s: Assembler messages:
/tmp/1-RUn2xF.s:27: Error: invalid constant (1ff) after fixup

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