[LLVMbugs] [Bug 13391] New: Mixed vector and scalar types in expressions have surprise semantics

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=13391

             Bug #: 13391
           Summary: Mixed vector and scalar types in expressions have
                    surprise semantics
           Product: clang
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: LLVM Codegen
        AssignedTo: unassignedclangbugs at nondot.org
        ReportedBy: simon.hosie at arm.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


Created attachment 8917
  --> http://llvm.org/bugs/attachment.cgi?id=8917
Code demonstrating different semantics.

It's possible to create a vector data type (using the ext_vector_type
attribute) where in combination with a scalar constant, that same constant will
be copied to all lanes to perform type-consistent arithmetic.

An error is emitted if the constant size does not match the element size of the
vector.  However, if the scalar size matches the size of the _whole_ vector
(eg., int mixed with uchar4) then no warning is emitted and we get the surprise
behaviour of the raw bit pattern being cast directly to the vector type.  So,
for example:
    uint8_t x __attribute__((ext_vector_type(4)));
    x = x << 1;
will shift one lane by 1, and the others by zero, because sizeof(1) ==
sizeof(x).  Whereas:
    uint8_t x __attribute__((ext_vector_type(4)));
    x = x << (uint8_t)1;
will shift all lanes by 1, and
    uint16_t x __attribute__((ext_vector_type(4)));
    x = x << 1;
is an error.

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