[LLVMbugs] [Bug 13280] New: ARM PLD/PLI Upredictable behavior not supported in decoder

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=13280

             Bug #: 13280
           Summary: ARM PLD/PLI Upredictable behavior not supported in
                    decoder
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: ARM
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: apazos at codeaurora.org
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


ARM Ltd. reported that MC Hammer test suite fails for ARM PLD/PLI unpredictable
instruction decoding scenarios.

Here are the failing scenarios:
ARM:
PLD,PLDW (immediate)
1. bits 15-12 should be one
PLD,PLDW (register)
2. bits 15-12 should be one
3. Rm == pc
4. R == 0 (PLDW) && Rn == pc (becomes a PLD (literal) with a should-be-zero bit
wrong) PLI (register) 
5. Rm == pc

Similar bug has been opened for Thumb PLD/PLI. See bug entry
http://llvm.org/bugs/show_bug.cgi?id=13037 for more details.

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