[LLVMbugs] [Bug 13275] New: Problem when passing small vector as parameter for ARM + NEON target

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=13275

             Bug #: 13275
           Summary: Problem when passing small vector as parameter for ARM
                    + NEON target
           Product: new-bugs
           Version: 3.1
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: new bugs
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: babslachem at gmail.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


Here is a small example to reproduce the problem I'm experiencing:

; ModuleID = 'bugparam.ll'
target datalayout =
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
target triple = "thumbv7-none-linux-androideabi"

define arm_aapcscc void @bar(i8* nocapture %.T0352, i16* nocapture %p) {
L.entry:
  %0 = load i16* %p, align 2
  %1 = bitcast i16 %0 to <2 x i8>
  %2 = getelementptr i16* %p, i32 1
  %3 = load i16* %2, align 2
  %4 = bitcast i16 %3 to <2 x i8>
  tail call arm_aapcscc  void @zzz(<2 x i8> %1, <2 x i8> %4)
  ret void
}

declare arm_aapcscc void @zzz(<2 x i8>, <2 x i8>)

using llc as follows:
llc bugparam.ll -march=arm -mcpu=cortex-a9 -mattr=+neon,+neonfp
-relocation-model=pic -o bugparam.s

with LLVM 3.0, it works, with LLVM 3.1 generated code contains a misaligned
load:

bar:                                    @ @bar
@ BB#0:                                 @ %L.entry
    push    {r11, lr}
    add r0, r1, #2
    vldr    s0, [r1]               
    vldr    s2, [r0]                     # <= here load is misaligned
    vmovl.u8    q8, d0
    vmovl.u8    q9, d1
    vmovl.u16   q8, d16
    vmovl.u16   q9, d18
    vmov    r0, r1, d16
    vmov    r2, r3, d18
    bl  zzz(PLT)
    pop {r11, pc}

with LLVM trunk, assembly looks like:

bar:                                    @ @bar
@ BB#0:                                 @ %L.entry
    push    {r11, lr}
    add r0, r1, #2
    vld1.32 {d16[0]}, [r1, :16]
    vld1.32 {d17[0]}, [r0, :16]
    vmovl.u8    q9, d16
    vmovl.u8    q8, d17
    vmovl.u16   q9, d18
    vmovl.u16   q8, d16
    vmov    r0, r1, d18
    vmov    r2, r3, d16
    bl  zzz(PLT)
    pop {r11, pc}
.Ltmp0:
    .size   bar, .Ltmp0-bar

and assembler complaints with following message:

bugparam.s:19: Error: unsupported alignment for instruction -- `vld1.32
{d16[0]},[r1,:16]'
bugparam.s:20: Error: unsupported alignment for instruction -- `vld1.32
{d17[0]},[r0,:16]'

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