[LLVMbugs] [Bug 11767] New: TableGen allows (illegal) anonymous 'defm's inside of multiclasses
bugzilla-daemon at llvm.org
bugzilla-daemon at llvm.org
Sun Jan 15 07:03:37 PST 2012
http://llvm.org/bugs/show_bug.cgi?id=11767
Bug #: 11767
Summary: TableGen allows (illegal) anonymous 'defm's inside of
multiclasses
Product: new-bugs
Version: 3.0
Platform: PC
OS/Version: Linux
Status: NEW
Severity: enhancement
Priority: P
Component: new bugs
AssignedTo: unassignedbugs at nondot.org
ReportedBy: stephen.mcgruer+bugzilla at gmail.com
CC: llvmbugs at cs.uiuc.edu
Classification: Unclassified
Currently in LLVM it is legal to define two multiclasses (and an example
instruction) like so:
multiclass A<string OpString, PatFrag OpNode> {
def rr : Pseudo<(outs Reg:$dst),
(ins Reg:$src1, Reg:$src2),
!strconcat(OpString, " $dst,$src1,$src2",
[(set Reg:$dst, (OpNode Reg:$src1, $src2))]>;
}
multiclass B<string OpString, PatFrag OpNode> {
// A Bad-Thing to do, but *legal*!
defm : A<OpString,OpNode>;
}
def ADD : B<"add", add>;
This passes llvm-tblegen (or whatever make runs on .td files), and generates an
include file XXXInstrInfo.inc with the contents:
namespace XXX {
enum {
...
ADDanonymous.0 = 18,
...
}
}
This is obviously non-legal C++ code, so if it is later included anywhere, a
compile error is thrown:
"error: expected ‘}’ before numeric constant"
While this is not a serious issue, as it will fail at compile time as soon as
the instruction tablegen file is used, it would be nice in my opinion if
tablegen was able to disallow anonymous "defm"s (and likely "def"s too, but I
have not tested that case) inside of multiclasses.
--
Configure bugmail: http://llvm.org/bugs/userprefs.cgi?tab=email
------- You are receiving this mail because: -------
You are on the CC list for the bug.
More information about the llvm-bugs
mailing list