[LLVMbugs] [Bug 11753] New: Incorrect code generated for 64bit types on ARM
bugzilla-daemon at llvm.org
bugzilla-daemon at llvm.org
Thu Jan 12 15:36:03 PST 2012
http://llvm.org/bugs/show_bug.cgi?id=11753
Bug #: 11753
Summary: Incorrect code generated for 64bit types on ARM
Product: clang
Version: 3.0
Platform: Other
OS/Version: Linux
Status: NEW
Severity: normal
Priority: P
Component: -New Bugs
AssignedTo: unassignedclangbugs at nondot.org
ReportedBy: mcharleb at codeaurora.org
CC: llvmbugs at cs.uiuc.edu
Classification: Unclassified
Created attachment 7873
--> http://llvm.org/bugs/attachment.cgi?id=7873
Test program to demonstrate the bug
LLVM is not handling 64bit types like gcc on ARM and the behavior is seemingly
incorrect. When I run the attached program (test64.c), I get the following
output:
$ qemu-arm ./test64-gcc
src32 = 0xfeedc0de
dest32 = 0xfeedc0de
src64 = 0xdeadbeefabcdef0a
realign: src64 = 0xdeadbeefabcdef0a
dest64 = 0xdeadbeefabcdef0a
$ qemu-arm ./test64-llvm
src32 = 0xfeedc0de
dest32 = 0xfeedc0de
src64 = 0x6fd7ddeadbeef
realign: src64 = 0xdeadbeefabcdef0a
dest64 = 0x6fd8ddeadbeef
The problem is in the way LLVM allocates registers for the src64 and dest64
parameters. It uses r1 and r2 (not paired registers) and GCC always uses r2 and
r3 and prints the data correctly. The line with "realign" adds an additional
parameter to the call to printf so the 64bit type is placed in r2 and r3.
The LLVM generated assembly is also doing a bunch of unnecessary str
instructions of the input registers used, at the end of functions.
The stack is then popped and the str instructions are useless.
I have annotated the the sections of problematic code generated by LLVM in the
attached test64-llvm.excerpt.
The code generated by gcc is provided in the test64-gcc.excerpt attachement for
comparison.
The makefile and clang wrapper script used to build the executables is also
provided.
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