[LLVMbugs] [Bug 13693] Hexagon should use pseudo-instructions for atomic loads.

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=13693

Jakob Stoklund Olesen <stoklund at 2pi.dk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|                            |INVALID

--- Comment #1 from Jakob Stoklund Olesen <stoklund at 2pi.dk> 2012-08-28 15:44:44 CDT ---
Turns out this isn't necessary after all. We are using the MOVolatile bit on
atomic memory operands to enforce the ordering.

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