[LLVMbugs] [Bug 11001] New: Bug with zero shifts in DAGTypeLegalizer:: ExpandShiftWithUnknownAmountBit

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=11001

           Summary: Bug with zero shifts in DAGTypeLegalizer::
                    ExpandShiftWithUnknownAmountBit
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Common Code Generator Code
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: moo321 at mailinator.com
                CC: llvmbugs at cs.uiuc.edu


In lib/CodeGen/SelectionDag/LegalizeIntegerTypes.cpp.

Commit 90564 already added a note about the bug; there is a FIXME about it in
the code.

@g_shift = global i256 0
define i32 @main() {
    %shift = load i256* @g_shift
    %1 = shl i256 123, %shift
    %eq = icmp eq i256 %1, 123
    %ret = zext i1 %eq to i32    
    ret i32 %ret
}

This returns 0 on x86-64, interpreter returns 1.

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