[LLVMbugs] [Bug 10961] New: LLVM unnecessarily uses LDRB/STRB on Cortex-M3

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=10961

           Summary: LLVM unnecessarily uses LDRB/STRB on Cortex-M3
           Product: libraries
           Version: 2.9
          Platform: PC
        OS/Version: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: ARM
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: xocotl at gmail.com
                CC: llvmbugs at cs.uiuc.edu


Cortex-M3 can handle unaligned loads/stores unless a system flag has been set
to disable it. So, it would be nice if there were an option to prevent LLVM
from generating tons of LDRB/STRB instructions when it thinks the value is
unaligned. Especially as this processor typically is paired with say, 16 KB of
code space, and the LDRB/STRB balloons things to twice or more. :)

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