[LLVMbugs] [Bug 11260] New: Fold ADCS Rd, Rn, Rm to ADCS Rdn, Rm when d=n and .W not specified

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=11260

           Summary: Fold ADCS Rd, Rn, Rm to ADCS Rdn, Rm when d=n and .W
                    not specified
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: ARM
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: xocotl at gmail.com
                CC: llvmbugs at cs.uiuc.edu


Very minor feature suggestion:

I caught this while looking at the output of some Thumb 2 inline assembler.
ADCS Rd, Rn, Rm was encoded in wide form

...
  44:    f7ff fffe     bl    0 <s32_ufract_mul>
  48:    182d          adds    r5, r5, r0
  4a:    eb54 0401     adcs.w    r4, r4, r1
  4e:    bf64          itt    vs
  50:    17e5          asrvs    r5, r4, #31
...

The original inline assembler was

...
    "adds %Q0, %Q0, %Q1\n"
    "adcs %R0, %R0, %R1\n"
    "itt vs\n"
...

GCC folded this to the narrow form.
Granted in this particular case (porting it over from GCC), I could have just
used the two-argument, but what if I hadn't? If it folded after register
assignment into 16-bit forms where possible, this could save code space.

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