[LLVMbugs] [Bug 11422] New: AVX2 instructions generated with AVX1 target

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=11422

             Bug #: 11422
           Summary: AVX2 instructions generated with AVX1 target
           Product: new-bugs
           Version: trunk
          Platform: PC
        OS/Version: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: new bugs
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: matt at pharr.org
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


Created attachment 7639
  --> http://llvm.org/bugs/attachment.cgi?id=7639
bitcode

I'm still seeing some illegal instruction issues on an AVX1 system due to the
AVX1 target generating AVX2 instructions; the attached test case provides a
number of examples.  (A number of the below are AVX1, but note e.g. vpand,
vpxor, vpaddd/vpaddq, ..  I think some of the shifts are AVX2-only as well.)

% llc -mattr=+avx x.bc -o - | grep vp | awk '{print $1}' | sort | uniq
vblendvps
vdivps
vpaddd
vpaddq
vpand
vpcmpeqd
vpcmpgtd
vpermilps
vpextrd
vpextrq
vpextrw
vpinsrd
vpinsrw
vpminsd
vpmuludq
vpshufd
vpslld
vpsllq
vpsrad
vpsrld
vpsrlq
vpunpcklqdq
vpxor
%

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