[LLVMbugs] [Bug 10054] New: LLVM should transform bit test branch into select for better backend codegen
bugzilla-daemon at llvm.org
bugzilla-daemon at llvm.org
Mon May 30 19:02:23 PDT 2011
http://llvm.org/bugs/show_bug.cgi?id=10054
Summary: LLVM should transform bit test branch into select for
better backend codegen
Product: new-bugs
Version: trunk
Platform: Macintosh
OS/Version: MacOS X
Status: NEW
Severity: normal
Priority: P
Component: new bugs
AssignedTo: unassignedbugs at nondot.org
ReportedBy: david.majnemer at gmail.com
CC: llvmbugs at cs.uiuc.edu
take the following for example:
unsigned sb_4(unsigned x, unsigned y) {
if ((x & y) == 0) {
x &= ~y;
}
return x;
}
this ends up turning into:
define i32 @sb_4(i32 %x, i32 %y) nounwind uwtable readnone ssp {
entry:
%and = and i32 %y, %x
%cmp = icmp eq i32 %and, 0
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
%neg = xor i32 %y, -1
%and4 = and i32 %neg, %x
br label %if.end
if.end: ; preds = %if.then, %entry
%x.addr.0 = phi i32 [ %and4, %if.then ], [ %x, %entry ]
ret i32 %x.addr.0
}
however, I think it should turn into:
define i32 @sb_5(i32 %x, i32 %y) nounwind uwtable readnone ssp {
entry:
%and = and i32 %x, %y
%neg = xor i32 %y, -1
%and2 = and i32 %x, %neg
%cmp = icmp eq i32 %and, 0
%and2.x = select i1 %cmp, i32 %and2, i32 %x
ret i32 %and2.x
}
on x86-64 this results in nicer codegen because there is no branch, just a cmov
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