[LLVMbugs] [Bug 9912] New: ScheduleDAGRRList.cpp does not take debug information into account

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Fri May 13 17:09:16 PDT 2011


http://llvm.org/bugs/show_bug.cgi?id=9912

           Summary: ScheduleDAGRRList.cpp does not take debug information
                    into account
           Product: libraries
           Version: 2.9
          Platform: PC
        OS/Version: Windows NT
            Status: NEW
          Severity: normal
          Priority: P
         Component: Common Code Generator Code
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: micah.villmow at amd.com
                CC: llvmbugs at cs.uiuc.edu


Created an attachment (id=6588)
 --> (http://llvm.org/bugs/attachment.cgi?id=6588)
test case that shows the problem

The function PickNodeToScheduleBottomUp from ScheduleDAGRRList.cpp does not
take DebugLoc information into account when picking what node to schedule next. 
This causes LLVM to produce the following LLVM .debug_line information:
Line Number Statements:
  Extended opcode 2: set Address to 0x3a
  Special opcode 6: advance Address by 0 to 0x3a and Line by 1 to 2
  Set column to 29
  Extended opcode 2: set Address to 0x3d
  Special opcode 8: advance Address by 0 to 0x3d and Line by 3 to 5
  Set column to 23
  Extended opcode 2: set Address to 0x3f
  Special opcode 3: advance Address by 0 to 0x3f and Line by -2 to 3
  Set column to 29
  Extended opcode 2: set Address to 0x43
  Special opcode 7: advance Address by 0 to 0x43 and Line by 2 to 5
  Set column to 1
  Extended opcode 2: set Address to 0x54
  Special opcode 6: advance Address by 0 to 0x54 and Line by 1 to 6
  Extended opcode 2: set Address to 0x88
  Advance PC by 0 to 88
  Extended opcode 1: End of Sequence

The problem is the jump from line 5 to line 3 and then back to line 5.
This is because in the address calculation of this instruction, 
%tmp8 = load i32 addrspace(1)* %arrayidx7, align 4, !dbg !18,
The source gep instruction ends up being transformed into SDNode where the
operands to the add instruction have debug information from different source
lines. So which dbg.value gets emitted first depends entirely on the ordering
of the operands, which is problematic as if the operand with line number 5 gets
emitted first, then a debugger will jump from line 5 to line 3 when the second
operand gets selected and then jump back to line 5 when the result operand get
selected.

The patch I will provide produces the following debug_line information:
 Line Number Statements:
  Set column to 23
  Extended opcode 2: set Address to 0x3a
  Special opcode 7: advance Address by 0 to 0x3a and Line by 2 to 3
  Set column to 29
  Extended opcode 2: set Address to 0x3f
  Special opcode 7: advance Address by 0 to 0x3f and Line by 2 to 5
  Set column to 1
  Extended opcode 2: set Address to 0x52
  Special opcode 6: advance Address by 0 to 0x52 and Line by 1 to 6
  Extended opcode 2: set Address to 0x76
  Advance PC by 0 to 76
  Extended opcode 1: End of Sequence

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