[LLVMbugs] [Bug 9362] New: MC doesn't deduce operand size for bt/bts/btc/btr

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=9362

           Summary: MC doesn't deduce operand size for bt/bts/btc/btr
           Product: clang
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: -New Bugs
        AssignedTo: unassignedclangbugs at nondot.org
        ReportedBy: pageexec at freemail.hu
                CC: llvmbugs at cs.uiuc.edu, pageexec at freemail.hu
            Blocks: 4068


linux/arch/x86/include/asm/bitops.h has several inline functions that use the
bt* insns without an explicit operand size suffix, gcc gets this right but llvm
doesn't. one example:

arch/x86/include/asm/bitops.h:68:19: error: ambiguous instructions require an
explicit suffix (could be 'btsw', 'btsl', or 'btsq')
                asm volatile(LOCK_PREFIX "bts %1,%0"

with

 59 static __always_inline void
 60 set_bit(unsigned int nr, volatile unsigned long *addr)
 61 {
 62 »·······if (IS_IMMEDIATE(nr)) {
 63 »·······»·······asm volatile(LOCK_PREFIX "orb %1,%0"
 64 »·······»·······»·······: CONST_MASK_ADDR(nr, addr)
 65 »·······»·······»·······: "iq" ((u8)CONST_MASK(nr))
 66 »·······»·······»·······: "memory");
 67 »·······} else {
 68 »·······»·······asm volatile(LOCK_PREFIX "bts %1,%0"
 69 »·······»·······»·······: BITOP_ADDR(addr) : "Ir" (nr) : "memory");
 70 »·······}
 71 }

since the size of *addr is known, btsl should be deduced on i386 and btsq on
amd64.

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