[LLVMbugs] [Bug 10165] New: llvm-mc: floating point load shown as invalid with i386 target

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Tue Jun 21 08:55:35 PDT 2011


           Summary: llvm-mc: floating point load shown as invalid with
                    i386 target
           Product: new-bugs
           Version: 2.9
          Platform: PC
        OS/Version: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: new bugs
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: kkhoo at perfwizard.com
                CC: llvmbugs at cs.uiuc.edu

$ echo '0xdd 0x45 0xf0'|./llvm-mc -disassemble -triple=x86_64
    fldl    -16(%rbp)
$ echo '0xdd 0x45 0xf0'|./llvm-mc -disassemble -triple=i386
<stdin>:1:1: warning: invalid instruction encoding
0xdd 0x45 0xf0

>From the Intel software reference manual: "FLD—Load Floating Point Value...This
instruction’s operation is the same in non-64-bit modes and 64-bit mode."

$ ./llvm-mc -version
Low Level Virtual Machine (http://llvm.org/):
  llvm version 2.9
  Optimized build.
  Built Jun 20 2011 (12:11:38).
  Host: i386-apple-darwin10
  Host CPU: corei7

  Registered Targets:
    alpha   - Alpha [experimental]
    arm     - ARM
    bfin    - Analog Devices Blackfin [experimental]
    c       - C backend
    cellspu - STI CBEA Cell SPU [experimental]
    cpp     - C++ backend
    mblaze  - MBlaze
    mips    - Mips
    mipsel  - Mipsel
    msp430  - MSP430 [experimental]
    ppc32   - PowerPC 32
    ppc64   - PowerPC 64
    ptx     - PTX
    sparc   - Sparc
    sparcv9 - Sparc V9
    systemz - SystemZ
    thumb   - Thumb
    x86     - 32-bit X86: Pentium-Pro and above
    x86-64  - 64-bit X86: EM64T and AMD64
    xcore   - XCore

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