[LLVMbugs] [Bug 7222] New: [ARM JIT] Bitfield's "clear" and "insert" are not implemented

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=7222

           Summary: [ARM JIT] Bitfield's "clear" and "insert" are not
                    implemented
           Product: new-bugs
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: new bugs
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: sliao at google.com
                CC: llvmbugs at cs.uiuc.edu


Using common premul results in an error message in ARM JIT.

Below is our premul function:

int premul(int rgb, int a) {
    int r = (rgb >> 16) * a + 1;
    r = (r + (r >> 8)) >> 8;
    int g = ((rgb >> 8) & 0xff) * a + 1;
    g = (g + (g >> 8)) >> 8;
    int b = (rgb & 0xff) * a + 1;
    b = (b + (b >> 8)) >> 8;
    return r << 16 | g << 8 | b;
}

Then, the error message showed up: "ARMv6t2 JIT is not yet supported."

Grep the string "ARMv6t2 JIT is not yet supported." in ARMCodeEmitter.cpp leads
to this line in ARMCodeEmitter::emitDataProcessingInstruction():

  if (TID.Opcode == ARM::BFC) {
    report_fatal_error("ARMv6t2 JIT is not yet supported.");
  }

This opcode is not implemented.

Straight from ARM Architecture Reference Manual, A8.6.17 BFC and A8.6.18 BFI,
the code should be:

  } else if ((TID.Opcode == ARM::BFC) || (TID.Opcode == ARM::BFI)) {
      uint32_t v = ~MI.getOperand(2).getImm();
      int32_t lsb = CountTrailingZeros_32(v);
      int32_t msb = (32 - CountLeadingZeros_32(v)) - 1;
      // Insts[20-16] = msb, Insts[11-7] = lsb
      Binary |= (msb & 0x1F) << 16;
      Binary |= (lsb & 0x1F) << 7;
      emitWordLE(Binary);
      return;
  }

-- 
Configure bugmail: http://llvm.org/bugs/userprefs.cgi?tab=email
------- You are receiving this mail because: -------
You are on the CC list for the bug.