[LLVMbugs] [Bug 7447] New: llc does not optimize away dummy for loop

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=7447

           Summary: llc does not optimize away dummy for loop
           Product: tools
           Version: trunk
          Platform: PC
        OS/Version: Windows XP
            Status: NEW
          Severity: normal
          Priority: P
         Component: llc
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: jrengdahl at gmail.com
                CC: llvmbugs at cs.uiuc.edu


Created an attachment (id=5086)
 --> (http://llvm.org/bugs/attachment.cgi?id=5086)
C code that demonstrates the bug

A "for" loop can declare one or more locally scoped variables, but only of a
single type. If you want a "for" loop with locally scoped variables of two
different types, you can wrap your loop with a second dummy loop which declares
a second variable. The dummy loop is the first line of the following example:

     for(int x=0, x==0; x=1)    // dummy loop
        for(type y=z, ...       // real loop
           {
           body...
           x and y are locally scoped here
           }

The dummy "for" loop is designed so that it executes its body once and only
once. A good optimizer (for example, GCC) will optimize away any code generated
by the dummy loop. This is reminiscent of the dummy "do {...}while(0)" often
used to wrap macros, and which is also expected not to generate any code.

In some cases LLC does not optimize away the code of the dummy "for" loop. Both
cases where I have observed this the body of the inner "for" loop contained a
return statement. For simpler bodies the unwanted code is not emitted.

My target is ARM Cortex-A9 Thumb2, but I do not believe this issue is ARM
specific. I'm not that great at reading x86 asm code, but I think llc-2.7-x86
behaves similarly.

The front end is llvm-gcc 2.7. LLC came from a pre-2.8 SVN snapshot on June 15,
2010.

llc command line:
llc -O3 -mcpu=cortex-a9 -march=thumb -mattr=+thumb2  %1.bc -o %1.s

Source file is attached.

Generated ARM code:

        .cpu cortex-a9
        .file   "bug.cpp.bc"
        .thumb_func

_Z6decideRA100_j:
        mov     r1, r0
        movs    r0, #0
        mov     r2, r0
        b       .LBB0_6

.LBB0_1:
        ldr.w   r3, [r1, r2, lsl #2]
        adds    r0, r3, r0
        cmp.w   r0, #1000
        bls     .LBB0_3
        mov.w   r0, #1000
        bx      lr

.LBB0_3:
        adds    r2, #1

.LBB0_4:
        cmp     r2, #100
        blo     .LBB0_1
        movs    r2, #1          // should be optimized away

.LBB0_6:
        cmp     r2, #0          // should be optimized away
        beq     .LBB0_4         // should be optimized away
        bx      lr

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