[LLVMbugs] [Bug 7324] thumb2 mode doesn't use uxtb/uxth where expected

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=7324

Brian G. Lucas <bagel99 at gmail.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|RESOLVED                    |REOPENED
         Resolution|INVALID                     |

--- Comment #3 from Brian G. Lucas <bagel99 at gmail.com> 2010-06-11 15:18:57 CDT ---
I respectfully disagree.  There are CPUs, e.g. the cortex-m3, that implement
SXTB, SXTH, UXTB, UXTH but *not* SXTB16, UXTB16, SXTAB, UXTAB,SXTAH, UXTAH,
SXTAB16, UXTAB16.  Currently, there is but one predicate, HasT2ExtractPack,
that enables *all* of them.  So if there are T2 variants that don't have SXTB,
SXTH, UXTB, UXTH, then we need another predicate to enable them and turn it on
for the cortex-m3.

In fact the cortex-Mx series will eventually require several more predicates. 
Right now the cortex-m3 support is just wrong.

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