[LLVMbugs] [Bug 8825] New: MachineVerifier gives ARM register class mismatch errors on tests

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=8825

           Summary: MachineVerifier gives ARM register class mismatch
                    errors on tests
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: ARM
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: zwarich at apple.com
                CC: llvmbugs at cs.uiuc.edu


Here's an example:

******************** TEST 'LLVM :: CodeGen/Thumb/large-stack.ll' FAILED
********************
Script:
--
llc < /Volumes/Data/llvm/test/CodeGen/Thumb/large-stack.ll
-mtriple=thumb-apple-darwin | FileCheck
/Volumes/Data/llvm/test/CodeGen/Thumb/large-stack.ll
--
Exit Code: 1
Command Output (stderr):
--

# Machine code for function test3:
Frame Objects:
  fi#0: size=4, align=4, at location [SP]
  fi#1: size=4, align=4, at location [SP]
  fi#2: size=805306369, align=16, at location [SP]
Function Live Outs: %R0

0L    BB#0: derived from LLVM BB %0
4L        %reg16385<def> = tADDrSPi <fi#1>, 0; GPR:%reg16385
12L        %reg16384<def>, %CPSR<def,dead> = tMOVi8 0, pred:14, pred:%reg0;
tGPR:%reg16384
24L        tSTRi %reg16384, %reg16385<kill>, 0, pred:14, pred:%reg0;
mem:ST4[%tmp] tGPR:%reg16384 GPR:%reg16385
32L        %R0<def> = COPY %reg16384<kill>; tGPR:%reg16384
40L        tBX_RET %R0<imp-use,kill>

# End machine code for function test3.

*** Bad machine code: Illegal virtual register for instruction ***
- function:    test3
- basic block:  0x102846b98 (BB#0) [0L;52L)
- instruction: 4L    %reg16385<def> = tADDrSPi <fi#1>, 0; GPR:%reg16385
- operand 0:   %reg16385<def>
Expected a tGPR register, but got a GPR register

*** Bad machine code: Illegal virtual register for instruction ***
- function:    test3
- basic block:  0x102846b98 (BB#0) [0L;52L)
- instruction: 24L    tSTRi %reg16384, %reg16385<kill>, 0, pred:14, pred:%reg0;
mem:ST4[%tmp] tGPR:%reg16384 GPR:%reg16385
- operand 1:   %reg16385<kill>
Expected a tGPR register, but got a GPR register
LLVM ERROR: Found 2 machine code errors.

-- 
Configure bugmail: http://llvm.org/bugs/userprefs.cgi?tab=email
------- You are receiving this mail because: -------
You are on the CC list for the bug.