[LLVMbugs] [Bug 4891] New: Backend producing incorrect code for aliased buffers

[bugzilla-daemon at cs.uiuc.edu]

http://llvm.org/bugs/show_bug.cgi?id=4891

           Summary: Backend producing incorrect code for aliased buffers
           Product: new-bugs
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P2
         Component: new bugs
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: benedict.gaster at amd.com
                CC: llvmbugs at cs.uiuc.edu


When compiling the following program it is producing incorrect x86 code.

//foo.c
#include <setjmp.h>
#include <inttypes.h>

size_t global_id[4];

size_t get_index(unsigned int dimidx)
{
    return global_id[dimidx];
}


typedef short short2 __attribute__ ((vector_size (4)));

union _X {
    short2 s;
    int i;
};

typedef union _X X;

inline short2 as_short2(int x)
{
    X result;

    result.i = x;
    return result.s;
}

inline int as_int(short2 x)
{
    X result;

    result.s = x;
    return result.i;
}

void short2_int_swap(
  short2* b, 
  int* c)
{
    int gidx = get_index(0);
    short2 bval = b[gidx];
    int cval = c[gidx];

    b[gidx] = as_short2(cval);
    c[gidx] = as_int(bval);
}

Compiling with TOT or 2.6 with:

llvm-gcc -O3 -S foo.c

Gives the assembler for short2_int_swap:

        .align  16
        .globl  short2_int_swap
        .type   short2_int_swap, at function
short2_int_swap:
.Leh_func_begin4:
        movslq  global_id(%rip), %rax
        movl    (%rsi,%rax,4), %ecx
        movl    %ecx, (%rdi,%rax,4)
        movl    (%rdi,%rax,4), %ecx
        movl    %ecx, (%rsi,%rax,4)
        ret
        .size   short2_int_swap, .-short2_int_swap
.Leh_func_end4:

It looks like an edge is bring droped and thus leading to incorrect code.

Compiling the same code with gcc 4.3.3:

gcc -O3 -S foo.c

gives

globl short2_int_swap
        .type   short2_int_swap, @function
short2_int_swap:
.LFB9:
        movslq  global_id(%rip),%rax
        salq    $2, %rax
        addq    %rax, %rdi
        addq    %rax, %rsi
        movl    (%rdi), %edx
        movl    (%rsi), %eax
        movl    %edx, (%rsi)
        movl    %eax, (%rdi)
        ret


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