[LLVMbugs] [Bug 5391] New: assertion triggered in LiveIntervalAnalysis

[bugzilla-daemon at cs.uiuc.edu]

http://llvm.org/bugs/show_bug.cgi?id=5391

           Summary: assertion triggered in LiveIntervalAnalysis
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P2
         Component: Register Allocator
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: nunoplopes at sapo.pt
                CC: llvmbugs at cs.uiuc.edu


$ llc -o x a.ll
llc: LiveIntervalAnalysis.cpp:525: void
llvm::LiveIntervals::handlePhysicalRegisterDef(llvm::MachineBasicBlock*,
llvm::ilist_iterator<llvm::MachineInstr>, llvm::SlotIndex,
llvm::MachineOperand&, llvm::LiveInterval&, llvm::MachineInstr*): Assertion
`!mi->getOperand(DefIdx).isEarlyClobber() && "Two address instruction is an
early clobber?"' failed.


$ cat a.ll
%0 = type { i32, i32 }

define void @safe_address(i32 %res, i32 %size, i32 %offset) nounwind {
entry:
  %0 = call %0 asm "mull $3\0A\09addl $4,$0\0A\09adcl $1,$1",
"=&{ax},=&{dx},%0,rm,rm,~{dirflag},~{fpsr},~{flags}"(i32 %res, i32 %size, i32
%offset) nounwind
  ret void
}


reduced C code:
void safe_address(int res, int size, int offset) {
  unsigned long overflow = 0;
  __asm__ ("mull %3\n\taddl %4,%0\n\tadcl %1,%1" : "=&a"(res), "=&d" (overflow)
: "%0"(res), "rm"(size), "rm"(offset));
}


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