[LLVMbugs] [Bug 4166] Assert while trying to compile using ldc with arm as target on x86 host

bugzilla-daemon at cs.uiuc.edu bugzilla-daemon at cs.uiuc.edu
Mon May 18 06:33:32 PDT 2009


http://llvm.org/bugs/show_bug.cgi?id=4166


Xerxes Rånby <xerxes at zafena.se> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |xerxes at zafena.se
             Status|RESOLVED                    |REOPENED
         Resolution|FIXED                       |




--- Comment #3 from Xerxes Rånby <xerxes at zafena.se>  2009-05-18 08:33:31 ---
I have tested running the reduced testcase.ll using llc
This bug asserts on ARM using the thumb backend so i have reopened the bug.
The test case work using -march=arm and fails using -march=thumb

*OK*

root at overo:~/llvm-test/fail# llvm-as < pr4166.ll  | llc -march=arm
        .file   "<stdin>"


        .text
        .globl 
_D5tango3net7cluster4tina11CacheThread11CacheThread4loadMFE5tango3net7cluster4tina14ProtocolWriter14ProtocolWriter7CommandAaAaZv
        .align  2
_D5tango3net7cluster4tina11CacheThread11CacheThread4loadMFE5tango3net7cluster4tina14ProtocolWriter14ProtocolWriter7CommandAaAaZv:
        stmfd sp!, {r11, lr}
        sub sp, sp, #8
        @ implicit-def: r3
        str r3, [sp]
        mov r0, #0
        ldr r3, [r0]
        mov r2, #4
        ldr r2, [r2]
        str r2, [sp, #+8]
        str r3, [sp, #+4]
        @ implicit-def: r1
        @ implicit-def: r2
        @ implicit-def: r3
        @ implicit-def: lr
        mov lr, pc
        bx r0
        add sp, sp, #8
        ldmfd sp!, {r11, pc}
        .size
_D5tango3net7cluster4tina11CacheThread11CacheThread4loadMFE5tango3net7cluster4tina14ProtocolWriter14ProtocolWriter7CommandAaAaZv,
.-_D5tango3net7cluster4tina11CacheThread11CacheThread4loadMFE5tango3net7cluster4tina14ProtocolWriter14ProtocolWriter7CommandAaAaZv



*FAIL*

root at overo:~/llvm-test/fail# llvm-as < pr4166.ll  | llc -march=thumb
llc:
/usr/src/openembedded/overo/tmp/work/armv7a-angstrom-linux-gnueabi/llvm2.6-2.5+svnr20090511-r0/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1550:
llvm::SDValue<unnamed>::SelectionDAGLegalize::LegalizeOp(llvm::SDValue):
Assertion `(!IsLegalizingCall || Node->getOpcode() != ISD::CALL ||
Tmp3.getNode()->getOpcode() != ISD::CALLSEQ_END) && "Nested
CALLSEQ_START..CALLSEQ_END not supported."' failed.
Stack dump:
0.      Program arguments: llc -march=thumb 
1.      Running pass 'ARM Instruction Selection' on function
'@_D5tango3net7cluster4tina11CacheThread11CacheThread4loadMFE5tango3net7cluster4tina14ProtocolWriter14ProtocolWriter7CommandAaAaZv'
Aborted
root at overo:~/llvm-test/fail# 


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