[LLVMbugs] [Bug 4430] New: Too weak memory operation alignment from llvm-gcc with -O0

[bugzilla-daemon at cs.uiuc.edu]

http://llvm.org/bugs/show_bug.cgi?id=4430

           Summary: Too weak memory operation alignment from llvm-gcc with -
                    O0
           Product: new-bugs
           Version: unspecified
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P2
         Component: new bugs
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: hkultala at cs.tut.fi
                CC: llvmbugs at cs.uiuc.edu


C-code

__attribute__((noinline))
void resInput(int *restrict input_buf, int *restrict output_buf) {
    for (int i = 0; i < 4; ++i) {
        output_buf[i] = input_buf[i];
    }
}

gets compiled into


define void @resInput(i32* noalias %input_buf, i32* noalias %output_buf)
nounwind noinline {
entry:  
        %input_buf_addr = alloca i32*           ; <i32**> [#uses=2]
        %output_buf_addr = alloca i32*          ; <i32**> [#uses=2]
        %i = alloca i32         ; <i32*> [#uses=6]
        %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
        store i32* %input_buf, i32** %input_buf_addr
        store i32* %output_buf, i32** %output_buf_addr
        store i32 0, i32* %i, align 4
        br label %bb1

bb:             ; preds = %bb1
        %0 = load i32** %input_buf_addr, align 4                ; <i32*>
[#uses=1]
        %1 = load i32* %i, align 4              ; <i32> [#uses=1]
        %2 = getelementptr i32* %0, i32 %1              ; <i32*> [#uses=1]
        %3 = load i32* %2, align 1              ; <i32> [#uses=1]
        %4 = load i32** %output_buf_addr, align 4               ; <i32*>
[#uses=1]
        %5 = load i32* %i, align 4              ; <i32> [#uses=1]
        %6 = getelementptr i32* %4, i32 %5              ; <i32*> [#uses=1]
        store i32 %3, i32* %6, align 1
        %7 = load i32* %i, align 4              ; <i32> [#uses=1]
        %8 = add i32 %7, 1              ; <i32> [#uses=1]
        store i32 %8, i32* %i, align 4
        br label %bb1

bb1:            ; preds = %bb, %entry
        %9 = load i32* %i, align 4              ; <i32> [#uses=1]
        %10 = icmp sle i32 %9, 3                ; <i1> [#uses=1]
        br i1 %10, label %bb, label %bb2

bb2:            ; preds = %bb1
        br label %return

return:         ; preds = %bb2
        ret void
}

when compiled with -O0. Some of those load i32 and store i32 operations have
align 1 instead of align 4.


With -O1 alignment is correct, the code becomes:

define void @resInput(i32* noalias %input_buf, i32* noalias %output_buf)
nounwind noinline {
bb1.thread:
        br label %bb1

bb1:            ; preds = %bb1, %bb1.thread
        %i.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %indvar.next, %bb1 ]   
; <i32> [#uses=3]
        %0 = getelementptr i32* %input_buf, i32 %i.0.reg2mem.0          ;
<i32*> [#uses=1]
        %1 = load i32* %0, align 4              ; <i32> [#uses=1]
        %2 = getelementptr i32* %output_buf, i32 %i.0.reg2mem.0         ;
<i32*> [#uses=1]
        store i32 %1, i32* %2, align 4
        %indvar.next = add i32 %i.0.reg2mem.0, 1                ; <i32>
[#uses=2]
        %exitcond = icmp eq i32 %indvar.next, 4         ; <i1> [#uses=1]
        br i1 %exitcond, label %return, label %bb1

return:         ; preds = %bb1
        ret void
}

Here the load and store have align 4 as it should have.


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