[LLVMbugs] [Bug 5754] LegalizeVectorTypes asserts on Vector SIGN_EXTEND_INREG

[bugzilla-daemon at cs.uiuc.edu]

http://llvm.org/bugs/show_bug.cgi?id=5754


Micah Villmow <micah.villmow at amd.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|RESOLVED                    |REOPENED
         Resolution|FIXED                       |




--- Comment #6 from Micah Villmow <micah.villmow at amd.com>  2009-12-22 15:38:36 ---
Dan,
 The solution that is given doesn't work in the case of a sign extending load
being expanded. Because sextload is not supported on this data type and is
scalarized before being expanded into extload + sign_extend_inreg.
case ISD::SIGN_EXTEND_INREG: {
    EVT EVT = cast<VTSDNode>(N2)->getVT();
    assert(VT == N1.getValueType() && "Not an inreg extend!");
    assert(VT.isInteger() && EVT.isInteger() &&
           "Cannot *_EXTEND_INREG FP types");
    assert(!EVT.isVector() &&
           "SIGN_EXTEND_INREG type should be the vector element type rather "
           "than the vector type!");
    assert(EVT.bitsLE(VT.getScalarType()) && "Not extending!");
    if (EVT == VT) return N1;  // Not actually extending

    if (N1C) {
      APInt Val = N1C->getAPIntValue();
      unsigned FromBits = EVT.getSizeInBits();
      Val <<= Val.getBitWidth()-FromBits;
      Val = Val.ashr(Val.getBitWidth()-FromBits);
      return getConstant(Val, VT);
    }
    break;
  }

The problem being that EVT.isVector is false, thus triggering an assert.

This is caused by this instruction: 
  0xe9d140: v4i32,ch = load 0xe5f160:1, 0xe9e980, 0xe9c000 <0xe44810:8> <sext
v4
i8> alignment=8
The sextload is expanded into extload + sext_in_reg of a vector type, which
triggers the above assert.

The test case is:
define void @__OpenCL_as_type_fail_kernel(<4 x i8> addrspace(1)* nocapture %a,
<
4 x i32> addrspace(1)* nocapture %b) nounwind {
get_global_id.exit:
  %call.i = tail call <4 x i32> @__amdil_get_global_id_int() nounwind ; <<4 x
i3
2>> [#uses=1]
  %tmp19.i.i = extractelement <4 x i32> %call.i, i32 0 ; <i32> [#uses=2]
  %arrayidx = getelementptr <4 x i32> addrspace(1)* %b, i32 %tmp19.i.i ; <<4 x
i
32> addrspace(1)*> [#uses=2]
  %cldi = load <4 x i32> addrspace(1)* %arrayidx  ; <<4 x i32>> [#uses=1]
  %cbci = bitcast <4 x i32> %cldi to <4 x i32>    ; <<4 x i32>> [#uses=1]
  %tmp2 = load <4 x i32> addrspace(1)* %arrayidx  ; <<4 x i32>> [#uses=0]
  %conv = bitcast <4 x i32> %cbci to <16 x i8>    ; <<16 x i8>> [#uses=4]
  %arrayidx5 = getelementptr <4 x i8> addrspace(1)* %a, i32 %tmp19.i.i ; <<4 x
i
8> addrspace(1)*> [#uses=2]
  %tmp7 = extractelement <16 x i8> %conv, i32 8   ; <i8> [#uses=1]
  %tmp8 = insertelement <4 x i8> undef, i8 %tmp7, i32 0 ; <<4 x i8>> [#uses=1]
  %tmp9 = extractelement <16 x i8> %conv, i32 9   ; <i8> [#uses=1]
  %tmp10 = insertelement <4 x i8> %tmp8, i8 %tmp9, i32 1 ; <<4 x i8>> [#uses=1]
  %tmp11 = extractelement <16 x i8> %conv, i32 10 ; <i8> [#uses=1]
  %tmp12 = insertelement <4 x i8> %tmp10, i8 %tmp11, i32 2 ; <<4 x i8>>
[#uses=1
]
  %tmp13 = extractelement <16 x i8> %conv, i32 11 ; <i8> [#uses=1]
  %tmp14 = insertelement <4 x i8> %tmp12, i8 %tmp13, i32 3 ; <<4 x i8>>
[#uses=1
]
  %cpti = ptrtoint <4 x i8> addrspace(1)* %arrayidx5 to i32 ; <i32> [#uses=2]
  %cbci1 = bitcast <4 x i8> addrspace(1)* %arrayidx5 to i32 addrspace(1)* ;
<i32
 addrspace(1)*> [#uses=0]
  %cmo = and i32 %cpti, 3                         ; <i32> [#uses=0]
  %csei = sext <4 x i8> %tmp14 to <4 x i32>       ; <<4 x i32>> [#uses=1]
  %cmo2 = and <4 x i32> %csei, <i32 255, i32 255, i32 255, i32 255> ; <<4 x
i32>
> [#uses=1]
  %cslo = shl <4 x i32> %cmo2, <i32 0, i32 8, i32 16, i32 24> ; <<4 x i32>>
[#us
es=4]
  %ceei = extractelement <4 x i32> %cslo, i32 0   ; <i32> [#uses=1]
  %ceei3 = extractelement <4 x i32> %cslo, i32 1  ; <i32> [#uses=1]
  %ceei4 = extractelement <4 x i32> %cslo, i32 2  ; <i32> [#uses=1]
  %ceei5 = extractelement <4 x i32> %cslo, i32 3  ; <i32> [#uses=1]
  %coi = or i32 %ceei, %ceei3                     ; <i32> [#uses=1]
  %coi6 = or i32 %coi, %ceei4                     ; <i32> [#uses=1]
  %coi7 = or i32 %coi6, %ceei5                    ; <i32> [#uses=1]
  %citp = inttoptr i32 %cpti to i32 addrspace(1)* ; <i32 addrspace(1)*>
[#uses=1
]
  store i32 %coi7, i32 addrspace(1)* %citp
  ret void
}

declare <4 x i32> @__amdil_get_global_id_int() unwind


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