[LLVMbugs] [Bug 3036] CellSPU assert 'false && "Invalid value type!"'
bugzilla-daemon at cs.uiuc.edu
bugzilla-daemon at cs.uiuc.edu
Mon Nov 10 17:56:04 PST 2008
http://llvm.org/bugs/show_bug.cgi?id=3036
Scott Michel <scooter.phd at gmail.com> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |scooter.phd at gmail.com
Status|NEW |RESOLVED
Resolution| |FIXED
--- Comment #1 from Scott Michel <scooter.phd at gmail.com> 2008-11-10 19:56:02 ---
Fixed. Uncovered additional argument handling bug in LowerFORMAL_ARGUMENTS as
well, which was also fixed.
(In reply to comment #0)
> Given the following C-language, test_float4.c, which is compiled with clang
>
> typedef float float4 __attribute__((ext_vector_type(4)));
>
> int check(float4 a) {
> return a.x == 0.0f;
> }
>
> Or given the following IR (after optimization)
>
> ; ModuleID = 'test-float4'
> target datalayout =
> "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128"
> target triple = "ppc-unknown-linux-gnu"
>
> define i32 @check(<4 x float> %a) nounwind readnone {
> entry:
> %0 = extractelement <4 x float> %a, i32 0 ; <float>
> [#uses=1]
> %1 = fcmp oeq float %0, 0.000000e+00 ; <i1> [#uses=1]
> %2 = zext i1 %1 to i32 ; <i32> [#uses=1]
> ret i32 %2
> }
>
> The CellSPU backend generates an assert failure (llc -march=cellspu
> test-float4)
>
> llc: SPUISelLowering.cpp:2070: llvm::SDValue
> LowerEXTRACT_VECTOR_ELT(llvm::SDValue, llvm::SelectionDAG&): Assertion `false
> && "Invalid value type!"' failed.
>
> I brief review of the code and it appears that the LowerEXTRACT_VECTOR_ELT
> function needs cases added for MVT::f32 and MVT::f64
>
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