[LLVMbugs] [Bug 1198] NEW: assertion failure handling 64-bit umulh sequence

[bugzilla-daemon at cs.uiuc.edu]

http://llvm.org/bugs/show_bug.cgi?id=1198

           Summary: assertion failure handling 64-bit umulh sequence
           Product: libraries
           Version: trunk
          Platform: All
        OS/Version: All
            Status: NEW
          Severity: normal
          Priority: P2
         Component: Common Code Generator Code
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: djg at cray.com


This test case:

define i64 @foo(i64 %x, i64 %y) {
        %tmp0 = zext i64 %x to i128
        %tmp1 = zext i64 %y to i128
        %tmp2 = mul i128 %tmp0, %tmp1
        %tmp7 = zext i32 64 to i128
        %tmp3 = lshr i128 %tmp2, %tmp7
        %tmp4 = trunc i128 %tmp3 to i64
        ret i64 %tmp4
}

compiled with -march=x86-64 triggers the following assertion failure:

lib/CodeGen/SelectionDAG/TargetLowering.cpp:2197: llvm::MVT::ValueType
llvm::TargetLowering::getValueType(const llvm::Type*) const: Assertion `0 &&
"Invalid width for value type"' failed.

The following patch fixes it.

Index: TargetLowering.cpp
===================================================================
RCS file: /var/cvs/llvm/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp,v
retrieving revision 1.89
diff -u -r1.89 TargetLowering.cpp
--- TargetLowering.cpp
+++ TargetLowering.cpp
@@ -2200,6 +2200,7 @@
       case 16:   return MVT::i16;
       case 32:   return MVT::i32;
       case 64:   return MVT::i64;
+      case 128:  return MVT::i128;
     }
     break;
   case Type::FloatTyID:   return MVT::f32;



------- You are receiving this mail because: -------
You are on the CC list for the bug, or are watching someone who is.