[LLVMbugs] [Bug 1838] New: x86 backend doesn't insert emms when it is needed

[bugzilla-daemon at cs.uiuc.edu]

http://llvm.org/bugs/show_bug.cgi?id=1838

           Summary: x86 backend doesn't insert emms when it is needed
           Product: new-bugs
           Version: unspecified
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: enhancement
          Priority: P2
         Component: new bugs
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: sharparrow1 at yahoo.com
                CC: llvmbugs at cs.uiuc.edu


target datalayout = "e-p:32:32-f64:32:64-i64:32:64-f80:32:32"

declare i32 @printf(i8*, ...)

@G = global double 4.0
@H = global <2 x i32> zeroinitializer

@L = global [5 x i8] c"%.2f\0A"

define i32 @main() {
%c = load double* @G
%a = load <2 x i32>* @H
%cc = add <2 x i32> %a, %a
store <2 x i32> %cc, <2 x i32>* @H
%l = getelementptr [5 x i8]* @L, i64 0, i64 0
call i32 (i8 *, ...)* @printf(i8* %l, double %c)
ret i32 0

This testcase, when compiled with llc, then gcc, and run on my x86-linux
computer, prints out "nan"; it should print out "4.0".

The cause is that the necessary "emms" is not generated after using the MMX
registers (the generated asm works fine once I manually add the emms).

This testcase, when compiled with llc, then gcc, and run on my x86-linux
computer, prints out "nan"; it should print out "4.0".

The cause is that the necessary "emms" is not generated after using the MMX
registers (the generated asm works fine once I manually add the emms).

Front-ends that generate vector code shouldn't be expected to know that on X86
specifically, for vectors 64 bits wide, a special intrinsic has to be called
after vector operations; also, the front-end has no real way to guarantee code
movement won't screw up such a fix.


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