[LLVMbugs] [Bug 1325] NEW: miscompilation due to switch -> shift/and code

[bugzilla-daemon at cs.uiuc.edu]

http://llvm.org/bugs/show_bug.cgi?id=1325

           Summary: miscompilation due to switch -> shift/and code
           Product: libraries
           Version: 1.0
          Platform: All
        OS/Version: All
            Status: NEW
          Severity: normal
          Priority: P2
         Component: Common Code Generator Code
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: sabre at nondot.org


Shift/And lowering is producing invalid code.  I'm not sure but I think that this is the issue:

LBB1_2:	;cond_next67
	lbz r2, 0(r29)
	li r3, 1
	cmplwi cr0, r2, 32
	slw r3, r3, r2
	bgt cr0, LBB1_4	;bb101.preheader

This allows a shift of 32.  On PPC, this will produce the same value as shifting by 31.  On X86, this 
produces the same value as shifting by 0.  This is the switch in question:

	switch i8 %tmp69, label %cond_next67.bb101_crit_edge [
		 i8 32, label %cond_next67.bb37_crit_edge
		 i8 9, label %cond_next67.bb37_crit_edge2
		 i8 10, label %cond_next67.bb37_crit_edge3
		 i8 13, label %cond_next67.bb37_crit_edge4
		 i8 12, label %cond_next67.bb37_crit_edge5
	]

That said, it is an impressive code size win :)

-Chris



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