[LLVMbugs] [Bug 621] NEW: llc -march=x86 output seems broken
bugzilla-daemon at cs.uiuc.edu
bugzilla-daemon at cs.uiuc.edu
Tue Aug 30 03:59:06 PDT 2005
http://llvm.cs.uiuc.edu/bugs/show_bug.cgi?id=621
Summary: llc -march=x86 output seems broken
Product: tools
Version: trunk
Platform: PC
OS/Version: Linux
Status: NEW
Severity: critical
Priority: P2
Component: llc
AssignedTo: unassignedbugs at nondot.org
ReportedBy: eric at vanrietpaap.nl
;generate .s file with:
;
;incorrect: llvm-as < simple5.ll | opt -simplifycfg | llc -march=x86
;correct : llvm-as < simple5.ll | opt -simplifycfg | llc -march=c
;correct : llvm-as < simple5.ll | opt | llc -march=x86
;correct : llvm-as < simple5.ll | opt -simplifycfg | llvm-dis
;
;Therefor my guess is that it's a bug in the llc x86 code generator and not in opt.
;
;incorrect output (.s file) is:
;
;.text
;.align 16
;.globl pypy_simple5
;.type pypy_simple5, @function
;pypy_simple5:
; movl $13, %ecx
; movl $12, %eax
; movb 4(%esp), %al
; testb %al, %al
; cmove %ecx, %eax
; ret
;.size pypy_simple5, .-pypy_simple5
;
;Which is incorrect because %eax gets modified by movb 4(%esp), %al
fastcc int %pypy_simple5(bool %b_4787) {
block0:
br bool %b_4787, label %block2, label %block1
block1:
%v4788 = phi int [13, %block0], [12, %block2]
ret int %v4788
block2:
br label %block1
}
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