From llvm-branch-commits at lists.llvm.org Sat Feb 1 03:00:30 2025 From: llvm-branch-commits at lists.llvm.org (Phoebe Wang via llvm-branch-commits) Date: Sat, 01 Feb 2025 03:00:30 -0800 (PST) Subject: [llvm-branch-commits] [clang] [X86][AVX10] Disable m[no-]avx10.1 and switch m[no-]avx10.2 to alias of 512 bit options (#124511) (PR #125057) In-Reply-To: Message-ID: <679dfece.050a0220.3cb17d.021f@mx.google.com> https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/125057 >From f816bd39f6986825e338198fce8747939ab1c882 Mon Sep 17 00:00:00 2001 From: Phoebe Wang Date: Thu, 30 Jan 2025 21:13:49 +0800 Subject: [PATCH] [X86][AVX10] Disable m[no-]avx10.1 and switch m[no-]avx10.2 to alias of 512 bit options (#124511) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Per the feedback we got, we’d like to switch m[no-]avx10.2 to alias of 512 bit options and disable m[no-]avx10.1 due to they were alias of 256 bit options. We also change -mno-avx10.[1,2]-512 to alias of 256 bit options to disable both 256 and 512 instructions. --- clang/docs/ReleaseNotes.rst | 4 ++++ clang/include/clang/Driver/Options.td | 12 +++++------- clang/lib/Driver/ToolChains/Arch/X86.cpp | 13 ++++++++----- clang/test/Driver/x86-target-features.c | 16 ++++++++++------ clang/test/Preprocessor/x86_target_features.c | 3 +-- 5 files changed, 28 insertions(+), 20 deletions(-) diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index d8a94703bd9c57..c36a84c2b8362b 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -1159,6 +1159,10 @@ X86 Support - Support ISA of ``MOVRS``. - Supported ``-march/tune=diamondrapids`` +- Disable ``-m[no-]avx10.1`` and switch ``-m[no-]avx10.2`` to alias of 512 bit + options. +- Change ``-mno-avx10.1-512`` to alias of ``-mno-avx10.1-256`` to disable both + 256 and 512 bit instructions. Arm and AArch64 Support ^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td index 1af633e59d0bba..a2b47b943ef90d 100644 --- a/clang/include/clang/Driver/Options.td +++ b/clang/include/clang/Driver/Options.td @@ -6441,15 +6441,13 @@ def mno_avx : Flag<["-"], "mno-avx">, Group; def mavx10_1_256 : Flag<["-"], "mavx10.1-256">, Group; def mno_avx10_1_256 : Flag<["-"], "mno-avx10.1-256">, Group; def mavx10_1_512 : Flag<["-"], "mavx10.1-512">, Group; -def mno_avx10_1_512 : Flag<["-"], "mno-avx10.1-512">, Group; -def mavx10_1 : Flag<["-"], "mavx10.1">, Alias; -def mno_avx10_1 : Flag<["-"], "mno-avx10.1">, Alias; +def mno_avx10_1_512 : Flag<["-"], "mno-avx10.1-512">, Alias; +def mavx10_1 : Flag<["-"], "mavx10.1">, Flags<[Unsupported]>; +def mno_avx10_1 : Flag<["-"], "mno-avx10.1">, Flags<[Unsupported]>; def mavx10_2_256 : Flag<["-"], "mavx10.2-256">, Group; -def mno_avx10_2_256 : Flag<["-"], "mno-avx10.2-256">, Group; def mavx10_2_512 : Flag<["-"], "mavx10.2-512">, Group; -def mno_avx10_2_512 : Flag<["-"], "mno-avx10.2-512">, Group; -def mavx10_2 : Flag<["-"], "mavx10.2">, Alias; -def mno_avx10_2 : Flag<["-"], "mno-avx10.2">, Alias; +def mavx10_2 : Flag<["-"], "mavx10.2">, Alias; +def mno_avx10_2 : Flag<["-"], "mno-avx10.2">, Group; def mavx2 : Flag<["-"], "mavx2">, Group; def mno_avx2 : Flag<["-"], "mno-avx2">, Group; def mavx512f : Flag<["-"], "mavx512f">, Group; diff --git a/clang/lib/Driver/ToolChains/Arch/X86.cpp b/clang/lib/Driver/ToolChains/Arch/X86.cpp index b2109e11038fe8..47c2c3e23f9fd9 100644 --- a/clang/lib/Driver/ToolChains/Arch/X86.cpp +++ b/clang/lib/Driver/ToolChains/Arch/X86.cpp @@ -237,15 +237,18 @@ void x86::getX86TargetFeatures(const Driver &D, const llvm::Triple &Triple, bool IsNegative = Name.consume_front("no-"); -#ifndef NDEBUG - assert(Name.starts_with("avx10.") && "Invalid AVX10 feature name."); StringRef Version, Width; std::tie(Version, Width) = Name.substr(6).split('-'); + assert(Name.starts_with("avx10.") && "Invalid AVX10 feature name."); assert((Version == "1" || Version == "2") && "Invalid AVX10 feature name."); - assert((Width == "256" || Width == "512") && "Invalid AVX10 feature name."); -#endif - Features.push_back(Args.MakeArgString((IsNegative ? "-" : "+") + Name)); + if (Width == "") { + assert(IsNegative && "Only negative options can omit width."); + Features.push_back(Args.MakeArgString("-" + Name + "-256")); + } else { + assert((Width == "256" || Width == "512") && "Invalid vector length."); + Features.push_back(Args.MakeArgString((IsNegative ? "-" : "+") + Name)); + } } // Now add any that the user explicitly requested on the command line, diff --git a/clang/test/Driver/x86-target-features.c b/clang/test/Driver/x86-target-features.c index 339f593dc760a8..18361251dcebc5 100644 --- a/clang/test/Driver/x86-target-features.c +++ b/clang/test/Driver/x86-target-features.c @@ -395,7 +395,8 @@ // EVEX512: "-target-feature" "+evex512" // NO-EVEX512: "-target-feature" "-evex512" -// RUN: %clang --target=i386 -mavx10.1 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10_1_256 %s +// RUN: not %clang --target=i386 -march=i386 -mavx10.1 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=UNSUPPORT-AVX10 %s +// RUN: not %clang --target=i386 -march=i386 -mno-avx10.1 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=UNSUPPORT-AVX10 %s // RUN: %clang --target=i386 -mavx10.1-256 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10_1_256 %s // RUN: %clang --target=i386 -mavx10.1-512 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10_1_512 %s // RUN: %clang --target=i386 -mavx10.1-256 -mavx10.1-512 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10_1_512 %s @@ -403,15 +404,18 @@ // RUN: not %clang --target=i386 -march=i386 -mavx10.1-128 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=BAD-AVX10 %s // RUN: not %clang --target=i386 -march=i386 -mavx10.a-256 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=BAD-AVX10 %s // RUN: not %clang --target=i386 -march=i386 -mavx10.1024-512 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=BAD-AVX10 %s -// RUN: %clang --target=i386 -march=i386 -mavx10.1 -mavx512f %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10-AVX512 %s -// RUN: %clang --target=i386 -march=i386 -mavx10.1 -mno-avx512f %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10-AVX512 %s -// RUN: %clang --target=i386 -march=i386 -mavx10.1 -mevex512 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10-EVEX512 %s -// RUN: %clang --target=i386 -march=i386 -mavx10.1 -mno-evex512 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10-EVEX512 %s -// RUN: %clang --target=i386 -mavx10.2 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10_2_256 %s +// RUN: %clang --target=i386 -march=i386 -mavx10.1-256 -mavx512f %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10-AVX512 %s +// RUN: %clang --target=i386 -march=i386 -mavx10.1-256 -mno-avx512f %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10-AVX512 %s +// RUN: %clang --target=i386 -march=i386 -mavx10.1-256 -mevex512 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10-EVEX512 %s +// RUN: %clang --target=i386 -march=i386 -mavx10.1-256 -mno-evex512 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10-EVEX512 %s +// RUN: %clang --target=i386 -mavx10.2 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10_2_512 %s +// RUN: %clang --target=i386 -mno-avx10.2 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-AVX10_2 %s // RUN: %clang --target=i386 -mavx10.2-256 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10_2_256 %s // RUN: %clang --target=i386 -mavx10.2-512 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=AVX10_2_512 %s // RUN: %clang --target=i386 -mavx10.2-256 -mavx10.1-512 %s -### -o %t.o 2>&1 | FileCheck -check-prefixes=AVX10_2_256,AVX10_1_512 %s // RUN: %clang --target=i386 -mavx10.2-512 -mavx10.1-256 %s -### -o %t.o 2>&1 | FileCheck -check-prefixes=AVX10_2_512,AVX10_1_256 %s +// UNSUPPORT-AVX10: error: unsupported option '-m{{.*}}avx10.1' for target 'i386' +// NO-AVX10_2: "-target-feature" "-avx10.2-256" // AVX10_2_256: "-target-feature" "+avx10.2-256" // AVX10_2_512: "-target-feature" "+avx10.2-512" // AVX10_1_256: "-target-feature" "+avx10.1-256" diff --git a/clang/test/Preprocessor/x86_target_features.c b/clang/test/Preprocessor/x86_target_features.c index fa3d0038f05a93..63222a882ff531 100644 --- a/clang/test/Preprocessor/x86_target_features.c +++ b/clang/test/Preprocessor/x86_target_features.c @@ -742,10 +742,8 @@ // AVXVNNIINT16NOAVX2-NOT: #define __AVX2__ 1 // AVXVNNIINT16NOAVX2-NOT: #define __AVXVNNIINT16__ 1 -// RUN: %clang -target i686-unknown-linux-gnu -march=atom -mavx10.1 -x c -E -dM -o - %s | FileCheck -check-prefix=AVX10_1_256 %s // RUN: %clang -target i686-unknown-linux-gnu -march=atom -mavx10.1-256 -x c -E -dM -o - %s | FileCheck -check-prefix=AVX10_1_256 %s // RUN: %clang -target i686-unknown-linux-gnu -march=atom -mavx10.1-256 -mno-avx512f -x c -E -dM -o - %s | FileCheck -check-prefix=AVX10_1_256 %s -// RUN: %clang -target i686-unknown-linux-gnu -march=atom -mavx10.2 -x c -E -dM -o - %s | FileCheck -check-prefixes=AVX10_1_256,AVX10_2_256 %s // RUN: %clang -target i686-unknown-linux-gnu -march=atom -mavx10.2-256 -x c -E -dM -o - %s | FileCheck -check-prefixes=AVX10_1_256,AVX10_2_256 %s // AVX10_1_256-NOT: __AVX10_1_512__ // AVX10_1_256: #define __AVX10_1__ 1 @@ -758,6 +756,7 @@ // RUN: %clang -target i686-unknown-linux-gnu -march=atom -mavx10.1-512 -x c -E -dM -o - %s | FileCheck -check-prefix=AVX10_1_512 %s // RUN: %clang -target i686-unknown-linux-gnu -march=atom -mavx10.1-512 -mno-avx512f -x c -E -dM -o - %s | FileCheck -check-prefix=AVX10_1_512 %s // RUN: %clang -target i686-unknown-linux-gnu -march=atom -mavx10.1-512 -mno-evex512 -x c -E -dM -o - %s | FileCheck -check-prefix=AVX10_1_512 %s +// RUN: %clang -target i686-unknown-linux-gnu -march=atom -mavx10.2 -x c -E -dM -o - %s | FileCheck -check-prefixes=AVX10_1_512,AVX10_2_512 %s // RUN: %clang -target i686-unknown-linux-gnu -march=atom -mavx10.2-512 -x c -E -dM -o - %s | FileCheck -check-prefixes=AVX10_1_512,AVX10_2_512 %s // AVX10_1_512: #define __AVX10_1_512__ 1 // AVX10_1_512: #define __AVX10_1__ 1 From llvm-branch-commits at lists.llvm.org Sat Feb 1 09:35:01 2025 From: llvm-branch-commits at lists.llvm.org (Akshat Oke via llvm-branch-commits) Date: Sat, 01 Feb 2025 09:35:01 -0800 (PST) Subject: [llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RenameIndependentSubregs to NPM (PR #125192) In-Reply-To: Message-ID: <679e5b45.170a0220.371dda.ac39@mx.google.com> https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/125192 >From 99a5e6c73fb0886e3aa5fdb1131c6ee53c5aeb96 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Fri, 31 Jan 2025 04:57:41 +0000 Subject: [PATCH] [CodeGen][NewPM] Port RenameIndependentSubregs to NPM --- .../llvm/CodeGen/RenameIndependentSubregs.h | 25 +++++++ llvm/include/llvm/InitializePasses.h | 2 +- llvm/include/llvm/Passes/CodeGenPassBuilder.h | 1 + .../llvm/Passes/MachinePassRegistry.def | 2 +- llvm/lib/CodeGen/CodeGen.cpp | 2 +- llvm/lib/CodeGen/RenameIndependentSubregs.cpp | 69 ++++++++++++------- llvm/lib/Passes/PassBuilder.cpp | 1 + .../coalescing-with-subregs-in-loop-bug.mir | 1 + ...ename-independent-subregs-mac-operands.mir | 1 + 9 files changed, 78 insertions(+), 26 deletions(-) create mode 100644 llvm/include/llvm/CodeGen/RenameIndependentSubregs.h diff --git a/llvm/include/llvm/CodeGen/RenameIndependentSubregs.h b/llvm/include/llvm/CodeGen/RenameIndependentSubregs.h new file mode 100644 index 00000000000000..2f6afe6bea6209 --- /dev/null +++ b/llvm/include/llvm/CodeGen/RenameIndependentSubregs.h @@ -0,0 +1,25 @@ +//===- llvm/CodeGen/RenameIndependentSubregs.h ------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CODEGEN_RENAME_INDEPENDENT_SUBREGS_H +#define LLVM_CODEGEN_RENAME_INDEPENDENT_SUBREGS_H + +#include "llvm/CodeGen/MachinePassManager.h" + +namespace llvm { + +class RenameIndependentSubregsPass + : public PassInfoMixin { +public: + PreservedAnalyses run(MachineFunction &MF, + MachineFunctionAnalysisManager &MFAM); +}; + +} // namespace llvm + +#endif // LLVM_CODEGEN_RENAME_INDEPENDENT_SUBREGS_H diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h index 46fcd17347f4e0..8beacde0151868 100644 --- a/llvm/include/llvm/InitializePasses.h +++ b/llvm/include/llvm/InitializePasses.h @@ -269,7 +269,7 @@ void initializeRegionViewerPass(PassRegistry &); void initializeRegisterCoalescerLegacyPass(PassRegistry &); void initializeRemoveLoadsIntoFakeUsesPass(PassRegistry &); void initializeRemoveRedundantDebugValuesPass(PassRegistry &); -void initializeRenameIndependentSubregsPass(PassRegistry &); +void initializeRenameIndependentSubregsLegacyPass(PassRegistry &); void initializeReplaceWithVeclibLegacyPass(PassRegistry &); void initializeResetMachineFunctionPass(PassRegistry &); void initializeSCEVAAWrapperPassPass(PassRegistry &); diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h index 9681368249a0f9..a3149e3d2f12bf 100644 --- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h +++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h @@ -59,6 +59,7 @@ #include "llvm/CodeGen/RegUsageInfoPropagate.h" #include "llvm/CodeGen/RegisterCoalescerPass.h" #include "llvm/CodeGen/RegisterUsageInfo.h" +#include "llvm/CodeGen/RenameIndependentSubregs.h" #include "llvm/CodeGen/ReplaceWithVeclib.h" #include "llvm/CodeGen/SafeStack.h" #include "llvm/CodeGen/SelectOptimize.h" diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def index 1d978f2ea31228..66e218c3a9f35e 100644 --- a/llvm/include/llvm/Passes/MachinePassRegistry.def +++ b/llvm/include/llvm/Passes/MachinePassRegistry.def @@ -165,6 +165,7 @@ MACHINE_FUNCTION_PASS("print", VirtRegMapPrinterPass(errs())) MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass()) MACHINE_FUNCTION_PASS("reg-usage-propagation", RegUsageInfoPropagationPass()) MACHINE_FUNCTION_PASS("register-coalescer", RegisterCoalescerPass()) +MACHINE_FUNCTION_PASS("rename-independent-subregs", RenameIndependentSubregsPass()) MACHINE_FUNCTION_PASS("require-all-machine-function-properties", RequireAllMachineFunctionPropertiesPass()) MACHINE_FUNCTION_PASS("stack-coloring", StackColoringPass()) @@ -263,7 +264,6 @@ DUMMY_MACHINE_FUNCTION_PASS("regallocscoringpass", RegAllocScoringPass) DUMMY_MACHINE_FUNCTION_PASS("regbankselect", RegBankSelectPass) DUMMY_MACHINE_FUNCTION_PASS("remove-loads-into-fake-uses", RemoveLoadsIntoFakeUsesPass) DUMMY_MACHINE_FUNCTION_PASS("removeredundantdebugvalues", RemoveRedundantDebugValuesPass) -DUMMY_MACHINE_FUNCTION_PASS("rename-independent-subregs", RenameIndependentSubregsPass) DUMMY_MACHINE_FUNCTION_PASS("reset-machine-function", ResetMachineFunctionPass) DUMMY_MACHINE_FUNCTION_PASS("shrink-wrap", ShrinkWrapPass) DUMMY_MACHINE_FUNCTION_PASS("stack-frame-layout", StackFrameLayoutAnalysisPass) diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp index 5f0c7ec9c8d018..d0194c03b41ad3 100644 --- a/llvm/lib/CodeGen/CodeGen.cpp +++ b/llvm/lib/CodeGen/CodeGen.cpp @@ -119,7 +119,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) { initializeRegisterCoalescerLegacyPass(Registry); initializeRemoveLoadsIntoFakeUsesPass(Registry); initializeRemoveRedundantDebugValuesPass(Registry); - initializeRenameIndependentSubregsPass(Registry); + initializeRenameIndependentSubregsLegacyPass(Registry); initializeSafeStackLegacyPassPass(Registry); initializeSelectOptimizePass(Registry); initializeShadowStackGCLoweringPass(Registry); diff --git a/llvm/lib/CodeGen/RenameIndependentSubregs.cpp b/llvm/lib/CodeGen/RenameIndependentSubregs.cpp index 0128f87748a77f..58f212e1ba5218 100644 --- a/llvm/lib/CodeGen/RenameIndependentSubregs.cpp +++ b/llvm/lib/CodeGen/RenameIndependentSubregs.cpp @@ -26,6 +26,7 @@ // //===----------------------------------------------------------------------===// +#include "llvm/CodeGen/RenameIndependentSubregs.h" #include "LiveRangeUtils.h" #include "PHIEliminationUtils.h" #include "llvm/CodeGen/LiveInterval.h" @@ -43,25 +44,11 @@ using namespace llvm; namespace { -class RenameIndependentSubregs : public MachineFunctionPass { +class RenameIndependentSubregs { public: - static char ID; - RenameIndependentSubregs() : MachineFunctionPass(ID) {} - - StringRef getPassName() const override { - return "Rename Disconnected Subregister Components"; - } - - void getAnalysisUsage(AnalysisUsage &AU) const override { - AU.setPreservesCFG(); - AU.addRequired(); - AU.addPreserved(); - AU.addRequired(); - AU.addPreserved(); - MachineFunctionPass::getAnalysisUsage(AU); - } + RenameIndependentSubregs(LiveIntervals *LIS) : LIS(LIS) {} - bool runOnMachineFunction(MachineFunction &MF) override; + bool run(MachineFunction &MF); private: struct SubRangeInfo { @@ -106,17 +93,36 @@ class RenameIndependentSubregs : public MachineFunctionPass { const TargetInstrInfo *TII = nullptr; }; +class RenameIndependentSubregsLegacy : public MachineFunctionPass { +public: + static char ID; + RenameIndependentSubregsLegacy() : MachineFunctionPass(ID) {} + bool runOnMachineFunction(MachineFunction &MF) override; + StringRef getPassName() const override { + return "Rename Disconnected Subregister Components"; + } + + void getAnalysisUsage(AnalysisUsage &AU) const override { + AU.setPreservesCFG(); + AU.addRequired(); + AU.addPreserved(); + AU.addRequired(); + AU.addPreserved(); + MachineFunctionPass::getAnalysisUsage(AU); + } +}; + } // end anonymous namespace -char RenameIndependentSubregs::ID; +char RenameIndependentSubregsLegacy::ID; -char &llvm::RenameIndependentSubregsID = RenameIndependentSubregs::ID; +char &llvm::RenameIndependentSubregsID = RenameIndependentSubregsLegacy::ID; -INITIALIZE_PASS_BEGIN(RenameIndependentSubregs, DEBUG_TYPE, +INITIALIZE_PASS_BEGIN(RenameIndependentSubregsLegacy, DEBUG_TYPE, "Rename Independent Subregisters", false, false) INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass) INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass) -INITIALIZE_PASS_END(RenameIndependentSubregs, DEBUG_TYPE, +INITIALIZE_PASS_END(RenameIndependentSubregsLegacy, DEBUG_TYPE, "Rename Independent Subregisters", false, false) bool RenameIndependentSubregs::renameComponents(LiveInterval &LI) const { @@ -381,7 +387,25 @@ void RenameIndependentSubregs::computeMainRangesFixFlags( } } -bool RenameIndependentSubregs::runOnMachineFunction(MachineFunction &MF) { +PreservedAnalyses +RenameIndependentSubregsPass::run(MachineFunction &MF, + MachineFunctionAnalysisManager &MFAM) { + auto &LIS = MFAM.getResult(MF); + if (!RenameIndependentSubregs(&LIS).run(MF)) + return PreservedAnalyses::all(); + auto PA = getMachineFunctionPassPreservedAnalyses(); + PA.preserveSet(); + PA.preserve(); + PA.preserve(); + return PA; +} + +bool RenameIndependentSubregsLegacy::runOnMachineFunction(MachineFunction &MF) { + auto &LIS = getAnalysis().getLIS(); + return RenameIndependentSubregs(&LIS).run(MF); +} + +bool RenameIndependentSubregs::run(MachineFunction &MF) { // Skip renaming if liveness of subregister is not tracked. MRI = &MF.getRegInfo(); if (!MRI->subRegLivenessEnabled()) @@ -390,7 +414,6 @@ bool RenameIndependentSubregs::runOnMachineFunction(MachineFunction &MF) { LLVM_DEBUG(dbgs() << "Renaming independent subregister live ranges in " << MF.getName() << '\n'); - LIS = &getAnalysis().getLIS(); TII = MF.getSubtarget().getInstrInfo(); // Iterate over all vregs. Note that we query getNumVirtRegs() the newly diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp index d9096edd3ba075..ce1f5d5a1fb575 100644 --- a/llvm/lib/Passes/PassBuilder.cpp +++ b/llvm/lib/Passes/PassBuilder.cpp @@ -129,6 +129,7 @@ #include "llvm/CodeGen/RegUsageInfoPropagate.h" #include "llvm/CodeGen/RegisterCoalescerPass.h" #include "llvm/CodeGen/RegisterUsageInfo.h" +#include "llvm/CodeGen/RenameIndependentSubregs.h" #include "llvm/CodeGen/SafeStack.h" #include "llvm/CodeGen/SelectOptimize.h" #include "llvm/CodeGen/ShadowStackGCLowering.h" diff --git a/llvm/test/CodeGen/AMDGPU/coalescing-with-subregs-in-loop-bug.mir b/llvm/test/CodeGen/AMDGPU/coalescing-with-subregs-in-loop-bug.mir index e066a48d9a3c26..dcc5d9dff33da5 100644 --- a/llvm/test/CodeGen/AMDGPU/coalescing-with-subregs-in-loop-bug.mir +++ b/llvm/test/CodeGen/AMDGPU/coalescing-with-subregs-in-loop-bug.mir @@ -1,4 +1,5 @@ # RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx803 -run-pass=register-coalescer,rename-independent-subregs %s -o - | FileCheck -check-prefix=GCN %s +# RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx803 -passes=register-coalescer,rename-independent-subregs %s -o - | FileCheck -check-prefix=GCN %s # This test is for a bug where the following happens: # diff --git a/llvm/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir b/llvm/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir index bb86f65f850dbf..97e970e4e573b8 100644 --- a/llvm/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir +++ b/llvm/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir @@ -1,4 +1,5 @@ # RUN: llc -mtriple=amdgcn -verify-machineinstrs -run-pass=register-coalescer,rename-independent-subregs -o - %s | FileCheck -check-prefix=GCN %s +# RUN: llc -mtriple=amdgcn -verify-machineinstrs -passes=register-coalescer,rename-independent-subregs -o - %s | FileCheck -check-prefix=GCN %s --- # GCN-LABEL: name: mac_invalid_operands