[llvm-branch-commits] [llvm-branch] r341523 - Merging r341416:
Hans Wennborg via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Thu Sep 6 01:16:34 PDT 2018
Author: hans
Date: Thu Sep 6 01:16:34 2018
New Revision: 341523
URL: http://llvm.org/viewvc/llvm-project?rev=341523&view=rev
Log:
Merging r341416:
------------------------------------------------------------------------
r341416 | annat | 2018-09-05 00:12:23 +0200 (Wed, 05 Sep 2018) | 11 lines
[LV] First order recurrence phis should not be treated as uniform
This is fix for PR38786.
First order recurrence phis were incorrectly treated as uniform,
which caused them to be vectorized as uniform instructions.
Patch by Ayal Zaks and Orivej Desh!
Reviewed by: Anna
Differential Revision: https://reviews.llvm.org/D51639
------------------------------------------------------------------------
Modified:
llvm/branches/release_70/ (props changed)
llvm/branches/release_70/lib/Transforms/Vectorize/LoopVectorize.cpp
llvm/branches/release_70/test/Transforms/LoopVectorize/X86/uniform-phi.ll
Propchange: llvm/branches/release_70/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Thu Sep 6 01:16:34 2018
@@ -1,3 +1,3 @@
/llvm/branches/Apple/Pertwee:110850,110961
/llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,338552,338554,338569,338599,338610,338658,338665,338682,338703,338709,338716,338751,338762,338817,338841,338902,338915,338968,339073,339091,339166,339179,339184,339190,339225,339316,339319,339411,339492,339515,339533,339535-339536,339600,339636,339674,339769,339822,339883,339895-339896,339945,340158,340303,340416-340417,340455,340641,340691,340751,340820,340839,340900,340959,341094,341244
+/llvm/trunk:155241,338552,338554,338569,338599,338610,338658,338665,338682,338703,338709,338716,338751,338762,338817,338841,338902,338915,338968,339073,339091,339166,339179,339184,339190,339225,339316,339319,339411,339492,339515,339533,339535-339536,339600,339636,339674,339769,339822,339883,339895-339896,339945,340158,340303,340416-340417,340455,340641,340691,340751,340820,340839,340900,340959,341094,341244,341416
Modified: llvm/branches/release_70/lib/Transforms/Vectorize/LoopVectorize.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_70/lib/Transforms/Vectorize/LoopVectorize.cpp?rev=341523&r1=341522&r2=341523&view=diff
==============================================================================
--- llvm/branches/release_70/lib/Transforms/Vectorize/LoopVectorize.cpp (original)
+++ llvm/branches/release_70/lib/Transforms/Vectorize/LoopVectorize.cpp Thu Sep 6 01:16:34 2018
@@ -4510,6 +4510,13 @@ void LoopVectorizationCostModel::collect
for (auto OV : I->operand_values()) {
if (isOutOfScope(OV))
continue;
+ // First order recurrence Phi's should typically be considered
+ // non-uniform.
+ auto *OP = dyn_cast<PHINode>(OV);
+ if (OP && Legal->isFirstOrderRecurrence(OP))
+ continue;
+ // If all the users of the operand are uniform, then add the
+ // operand into the uniform worklist.
auto *OI = cast<Instruction>(OV);
if (llvm::all_of(OI->users(), [&](User *U) -> bool {
auto *J = cast<Instruction>(U);
Modified: llvm/branches/release_70/test/Transforms/LoopVectorize/X86/uniform-phi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_70/test/Transforms/LoopVectorize/X86/uniform-phi.ll?rev=341523&r1=341522&r2=341523&view=diff
==============================================================================
--- llvm/branches/release_70/test/Transforms/LoopVectorize/X86/uniform-phi.ll (original)
+++ llvm/branches/release_70/test/Transforms/LoopVectorize/X86/uniform-phi.ll Thu Sep 6 01:16:34 2018
@@ -75,3 +75,25 @@ for.end:
ret i64 %retval
}
+; CHECK-LABEL: PR38786
+; Check that first order recurrence phis (%phi32 and %phi64) are not uniform.
+; CHECK-NOT: LV: Found uniform instruction: %phi
+define void @PR38786(double* %y, double* %x, i64 %n) {
+entry:
+ br label %for.body
+
+for.body:
+ %phi32 = phi i32 [ 0, %entry ], [ %i32next, %for.body ]
+ %phi64 = phi i64 [ 0, %entry ], [ %i64next, %for.body ]
+ %i32next = add i32 %phi32, 1
+ %i64next = zext i32 %i32next to i64
+ %xip = getelementptr inbounds double, double* %x, i64 %i64next
+ %yip = getelementptr inbounds double, double* %y, i64 %phi64
+ %xi = load double, double* %xip, align 8
+ store double %xi, double* %yip, align 8
+ %cmp = icmp slt i64 %i64next, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end:
+ ret void
+}
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