[llvm-branch-commits] [llvm-branch] r341453 - ReleaseNotes for PowerPC

Hans Wennborg via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Wed Sep 5 01:07:31 PDT 2018


Author: hans
Date: Wed Sep  5 01:07:31 2018
New Revision: 341453

URL: http://llvm.org/viewvc/llvm-project?rev=341453&view=rev
Log:
ReleaseNotes for PowerPC

Patch by Lei Huang!

Modified:
    llvm/branches/release_70/docs/ReleaseNotes.rst

Modified: llvm/branches/release_70/docs/ReleaseNotes.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_70/docs/ReleaseNotes.rst?rev=341453&r1=341452&r2=341453&view=diff
==============================================================================
--- llvm/branches/release_70/docs/ReleaseNotes.rst (original)
+++ llvm/branches/release_70/docs/ReleaseNotes.rst Wed Sep  5 01:07:31 2018
@@ -230,7 +230,31 @@ During this release the MIPS target has:
 Changes to the PowerPC Target
 -----------------------------
 
- During this release ...
+During this release the PowerPC target has:
+
+* Replaced the list scheduler for post register allocation with the machine scheduler.
+
+* Added support for coldcc calling convention.
+
+* Added support for ``symbol at high`` and ``symbol at higha`` symbol modifiers.
+
+* Added support for quad-precision floating point type (``__float128``) under the llvm option `-enable-ppc-quad-precision`.
+
+* Added dump function to ``LatencyPriorityQueue``.
+
+* Completed the Power9 scheduler model.
+
+* Optimized TLS code generation.
+
+* Improved MachineLICM for hoisting constant stores.
+
+* Improved code generation to reduce register use by using more register + immediate instructions.
+
+* Improved code generation to better exploit rotate-and-mask instructions.
+
+* Fixed the bug in dynamic loader for JIT which crashed NNVM.
+
+* Numerous bug fixes and code cleanups.
 
 Changes to the SystemZ Target
 -----------------------------




More information about the llvm-branch-commits mailing list