[llvm-branch-commits] [llvm-branch] r332943 - [X86] Add hasSideEffects=0 back to ADOX instructions. Partial cherrypick from r328952.

[Craig Topper via llvm-branch-commits]

Author: ctopper
Date: Mon May 21 21:22:44 2018
New Revision: 332943

URL: http://llvm.org/viewvc/llvm-project?rev=332943&view=rev
Log:
[X86] Add hasSideEffects=0 back to ADOX instructions. Partial cherrypick from r328952.

This flag was present before the cherrypick of 328945. This matches what happened on trunk. I've left out the scheduling changes from r328952 to minimize changes from 6.0.1.



Modified:
    llvm/branches/release_60/lib/Target/X86/X86InstrArithmetic.td

Modified: llvm/branches/release_60/lib/Target/X86/X86InstrArithmetic.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_60/lib/Target/X86/X86InstrArithmetic.td?rev=332943&r1=332942&r2=332943&view=diff
==============================================================================
--- llvm/branches/release_60/lib/Target/X86/X86InstrArithmetic.td (original)
+++ llvm/branches/release_60/lib/Target/X86/X86InstrArithmetic.td Mon May 21 21:22:44 2018
@@ -1351,11 +1351,13 @@ let Predicates = [HasADX], Defs = [EFLAG
              IIC_BIN_CARRY_NONMEM>, T8PD;
 
   // We don't have patterns for ADOX yet.
+  let hasSideEffects = 0 in {
   def ADOX32rr : I<0xF6, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src0, GR32:$src),
              "adox{l}\t{$src, $dst|$dst, $src}", [], IIC_BIN_NONMEM>, T8XS;
 
   def ADOX64rr : RI<0xF6, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src0, GR64:$src),
              "adox{q}\t{$src, $dst|$dst, $src}", [], IIC_BIN_NONMEM>, T8XS;
+  } // hasSideEffects = 0
   } // SchedRW
 
   let mayLoad = 1, SchedRW = [WriteALULd] in {
@@ -1372,10 +1374,12 @@ let Predicates = [HasADX], Defs = [EFLAG
              IIC_BIN_CARRY_MEM>, T8PD;
 
   // We don't have patterns for ADOX yet.
+  let hasSideEffects = 0 in {
   def ADOX32rm : I<0xF6, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src0, i32mem:$src),
              "adox{l}\t{$src, $dst|$dst, $src}", [], IIC_BIN_MEM>, T8XS;
 
   def ADOX64rm : RI<0xF6, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src0, i64mem:$src),
              "adox{q}\t{$src, $dst|$dst, $src}", [], IIC_BIN_MEM>, T8XS;
   }
+  } // hasSideEffects = 0
 }