[llvm-branch-commits] [llvm-branch] r325089 - Merging r324645:
Reid Kleckner via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Feb 13 16:33:00 PST 2018
Author: rnk
Date: Tue Feb 13 16:33:00 2018
New Revision: 325089
URL: http://llvm.org/viewvc/llvm-project?rev=325089&view=rev
Log:
Merging r324645:
------------------------------------------------------------------------
r324645 | dwmw2 | 2018-02-08 12:06:05 -0800 (Thu, 08 Feb 2018) | 5 lines
[X86] Support 'V' register operand modifier
This allows the register name to be printed without the leading '%'.
This can be used for emitting calls to the retpoline thunks from inline
asm.
------------------------------------------------------------------------
Added:
llvm/branches/release_50/test/CodeGen/X86/inline-asm-modifier-V.ll
- copied unchanged from r324645, llvm/trunk/test/CodeGen/X86/inline-asm-modifier-V.ll
Modified:
llvm/branches/release_50/ (props changed)
llvm/branches/release_50/lib/Target/X86/X86AsmPrinter.cpp
Propchange: llvm/branches/release_50/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Tue Feb 13 16:33:00 2018
@@ -1,2 +1,2 @@
-/llvm/trunk:313366,323155,323915,324449
+/llvm/trunk:313366,323155,323915,324449,324645
/llvm/trunk:155241,308483-308484,308503,308808,308813,308847,308891,308906,308950,308963,308978,308986,309044,309071,309113,309120,309122,309140,309227,309302,309321,309323,309325,309330,309343,309353,309355,309422,309481,309483,309495,309555,309561,309594,309614,309651,309744,309758,309849,309928,309930,309945,310066,310071,310190,310240-310242,310250,310253,310262,310267,310481,310492,310498,310510,310534,310552,310604,310712,310779,310784,310796,310842,310906,310926,310939,310979,310988,310990-310991,311061,311068,311071,311087,311229,311258,311263,311387,311429,311554,311565,311572,311623,311835,312022,312285,313334:312337
Modified: llvm/branches/release_50/lib/Target/X86/X86AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_50/lib/Target/X86/X86AsmPrinter.cpp?rev=325089&r1=325088&r2=325089&view=diff
==============================================================================
--- llvm/branches/release_50/lib/Target/X86/X86AsmPrinter.cpp (original)
+++ llvm/branches/release_50/lib/Target/X86/X86AsmPrinter.cpp Tue Feb 13 16:33:00 2018
@@ -344,6 +344,8 @@ static void printIntelMemReference(X86As
static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
char Mode, raw_ostream &O) {
unsigned Reg = MO.getReg();
+ bool EmitPercent = true;
+
switch (Mode) {
default: return true; // Unknown mode.
case 'b': // Print QImode register
@@ -358,6 +360,9 @@ static bool printAsmMRegister(X86AsmPrin
case 'k': // Print SImode register
Reg = getX86SubSuperRegister(Reg, 32);
break;
+ case 'V':
+ EmitPercent = false;
+ LLVM_FALLTHROUGH;
case 'q':
// Print 64-bit register names if 64-bit integer registers are available.
// Otherwise, print 32-bit register names.
@@ -365,7 +370,10 @@ static bool printAsmMRegister(X86AsmPrin
break;
}
- O << '%' << X86ATTInstPrinter::getRegisterName(Reg);
+ if (EmitPercent)
+ O << '%';
+
+ O << X86ATTInstPrinter::getRegisterName(Reg);
return false;
}
@@ -438,6 +446,7 @@ bool X86AsmPrinter::PrintAsmOperand(cons
case 'w': // Print HImode register
case 'k': // Print SImode register
case 'q': // Print DImode register
+ case 'V': // Print native register without '%'
if (MO.isReg())
return printAsmMRegister(*this, MO, ExtraCode[0], O);
printOperand(*this, MI, OpNo, O);
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