[llvm-branch-commits] [llvm-branch] r314567 - Merging r311951 and r312038:

[Tom Stellard via llvm-branch-commits]

Author: tstellar
Date: Fri Sep 29 16:39:09 2017
New Revision: 314567

URL: http://llvm.org/viewvc/llvm-project?rev=314567&view=rev
Log:
Merging r311951 and r312038:

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r311951 | adrian | 2017-08-28 16:07:43 -0700 (Mon, 28 Aug 2017) | 6 lines

Fix a logic error in DwarfExpression::addMachineReg()

This fixes PR34323 and thus splitting undescribable registers into
smaller, describable sub-registers.

https://bugs.llvm.org/show_bug.cgi?id=34323
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r312038 | joerg | 2017-08-29 14:18:07 -0700 (Tue, 29 Aug 2017) | 2 lines

Simplify test case, so that it works for both trunk and release-5.0.

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Added:
    llvm/branches/release_50/test/DebugInfo/Sparc/subreg.ll
Modified:
    llvm/branches/release_50/lib/CodeGen/AsmPrinter/DwarfExpression.cpp

Modified: llvm/branches/release_50/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_50/lib/CodeGen/AsmPrinter/DwarfExpression.cpp?rev=314567&r1=314566&r2=314567&view=diff
==============================================================================
--- llvm/branches/release_50/lib/CodeGen/AsmPrinter/DwarfExpression.cpp (original)
+++ llvm/branches/release_50/lib/CodeGen/AsmPrinter/DwarfExpression.cpp Fri Sep 29 16:39:09 2017
@@ -131,13 +131,12 @@ bool DwarfExpression::addMachineReg(cons
 
     // Intersection between the bits we already emitted and the bits
     // covered by this subregister.
-    SmallBitVector Intersection(RegSize, false);
-    Intersection.set(Offset, Offset + Size);
-    Intersection ^= Coverage;
+    SmallBitVector CurSubReg(RegSize, false);
+    CurSubReg.set(Offset, Offset + Size);
 
     // If this sub-register has a DWARF number and we haven't covered
     // its range, emit a DWARF piece for it.
-    if (Reg >= 0 && Intersection.any()) {
+    if (Reg >= 0 && CurSubReg.test(Coverage)) {
       // Emit a piece for any gap in the coverage.
       if (Offset > CurPos)
         DwarfRegs.push_back({-1, Offset - CurPos, nullptr});

Added: llvm/branches/release_50/test/DebugInfo/Sparc/subreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_50/test/DebugInfo/Sparc/subreg.ll?rev=314567&view=auto
==============================================================================
--- llvm/branches/release_50/test/DebugInfo/Sparc/subreg.ll (added)
+++ llvm/branches/release_50/test/DebugInfo/Sparc/subreg.ll Fri Sep 29 16:39:09 2017
@@ -0,0 +1,35 @@
+; RUN: llc -filetype=obj -O0 < %s -mtriple sparc64-unknown-linux-gnu | llvm-dwarfdump - | FileCheck %s
+; The undescribable 128-bit register should be split into two 64-bit registers.
+; CHECK: Location description: 90 48 93 08 90 49 93 08
+;                              DW_OP_reg74 DW_OP_piece 8 DW_OP_reg75 DW_OP_piece 8 ...
+
+target datalayout = "E-m:e-i64:64-n32:64-S128"
+target triple = "sparc64"
+
+; Function Attrs: nounwind readnone
+define void @fn1(fp128 %b) local_unnamed_addr !dbg !7 {
+entry:
+  tail call void @llvm.dbg.value(metadata fp128 %b, i64 0, metadata !13, metadata !18), !dbg !17
+  tail call void @llvm.dbg.value(metadata fp128 0xL00000000000000000000000000000000, i64 0, metadata !13, metadata !19), !dbg !17
+  ret void, !dbg !20
+}
+
+; Function Attrs: nounwind readnone speculatable
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!4}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, emissionKind: FullDebug)
+!1 = !DIFile(filename: "subreg.c", directory: ".")
+!4 = !{i32 2, !"Debug Info Version", i32 3}
+!7 = distinct !DISubprogram(name: "fn1", scope: !1, file: !1, line: 1, type: !8, unit: !0)
+!8 = !DISubroutineType(types: !9)
+!9 = !{null, !10}
+!10 = !DIBasicType(name: "long double", size: 128, encoding: DW_ATE_float)
+!13 = !DILocalVariable(name: "a", scope: !7, file: !1, line: 1, type: !14)
+!14 = !DIBasicType(name: "complex", size: 256, encoding: DW_ATE_complex_float)
+!17 = !DILocation(line: 1, column: 48, scope: !7)
+!18 = !DIExpression(DW_OP_LLVM_fragment, 0, 128)
+!19 = !DIExpression(DW_OP_LLVM_fragment, 128, 128)
+!20 = !DILocation(line: 1, column: 55, scope: !7)