[llvm-branch-commits] [llvm-branch] r314379 - Merging r314179:

[Dylan McKay via llvm-branch-commits]

Author: dylanmckay
Date: Wed Sep 27 23:16:45 2017
New Revision: 314379

URL: http://llvm.org/viewvc/llvm-project?rev=314379&view=rev
Log:
Merging r314179:
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r314179 | dylanmckay | 2017-09-26 13:45:27 +1300 (Tue, 26 Sep 2017) | 11 lines

[AVR] Use 1-byte alignment for all data types

This was an oversight in the original backend data layout.

The AVR architecture does not have the concept of unaligned loads - all
loads/stores from all addresses are aligned to one byte.

Discovered in avr-rust issue #64
https://github.com/avr-rust/rust/issues/64

Patch By Gergo Erdi.
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Modified:
    llvm/branches/release_50/lib/Target/AVR/AVRTargetMachine.cpp

Modified: llvm/branches/release_50/lib/Target/AVR/AVRTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_50/lib/Target/AVR/AVRTargetMachine.cpp?rev=314379&r1=314378&r2=314379&view=diff
==============================================================================
--- llvm/branches/release_50/lib/Target/AVR/AVRTargetMachine.cpp (original)
+++ llvm/branches/release_50/lib/Target/AVR/AVRTargetMachine.cpp Wed Sep 27 23:16:45 2017
@@ -25,7 +25,7 @@
 
 namespace llvm {
 
-static const char *AVRDataLayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-n8";
+static const char *AVRDataLayout = "e-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8";
 
 /// Processes a CPU name.
 static StringRef getCPU(StringRef CPU) {