[llvm-branch-commits] [llvm-branch] r294242 - Merging r294203:

[Hans Wennborg via llvm-branch-commits]

Author: hans
Date: Mon Feb  6 15:27:55 2017
New Revision: 294242

URL: http://llvm.org/viewvc/llvm-project?rev=294242&view=rev
Log:
Merging r294203:
------------------------------------------------------------------------
r294203 | john.brawn | 2017-02-06 10:07:20 -0800 (Mon, 06 Feb 2017) | 9 lines

[AArch64] Fix incorrect MachinePointerInfo in splitStoreSplat

When splitting up one store into several in splitStoreSplat we have to
make sure we get the MachinePointerInfo right, otherwise alias
analysis thinks they all store to the same location. This can then
cause invalid scheduling later on.

Differential Revision: https://reviews.llvm.org/D29446

------------------------------------------------------------------------

Added:
    llvm/branches/release_40/test/CodeGen/AArch64/ldst-zero.ll
      - copied unchanged from r294203, llvm/trunk/test/CodeGen/AArch64/ldst-zero.ll
    llvm/branches/release_40/test/CodeGen/AArch64/misched-stp.ll
      - copied unchanged from r294203, llvm/trunk/test/CodeGen/AArch64/misched-stp.ll
Modified:
    llvm/branches/release_40/   (props changed)
    llvm/branches/release_40/lib/Target/AArch64/AArch64ISelLowering.cpp

Propchange: llvm/branches/release_40/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Mon Feb  6 15:27:55 2017
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,291858-291859,291863,291875,291909,291918,291966,291968,291979,292117,292133,292167,292169-292170,292242,292254-292255,292280,292323,292444,292467,292516,292583,292624-292625,292641,292651,292667,292711-292713,292758,293021,293025,293230,293259,293291,293293,293309,293345,293417,293522,293542,293629,293635,293658,293673,293727,293730,294102
+/llvm/trunk:155241,291858-291859,291863,291875,291909,291918,291966,291968,291979,292117,292133,292167,292169-292170,292242,292254-292255,292280,292323,292444,292467,292516,292583,292624-292625,292641,292651,292667,292711-292713,292758,293021,293025,293230,293259,293291,293293,293309,293345,293417,293522,293542,293629,293635,293658,293673,293727,293730,294102,294203

Modified: llvm/branches/release_40/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_40/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=294242&r1=294241&r2=294242&view=diff
==============================================================================
--- llvm/branches/release_40/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/branches/release_40/lib/Target/AArch64/AArch64ISelLowering.cpp Mon Feb  6 15:27:55 2017
@@ -8934,8 +8934,9 @@ static SDValue splitStoreSplat(Selection
   // instructions (stp).
   SDLoc DL(&St);
   SDValue BasePtr = St.getBasePtr();
+  const MachinePointerInfo &PtrInfo = St.getPointerInfo();
   SDValue NewST1 =
-      DAG.getStore(St.getChain(), DL, SplatVal, BasePtr, St.getPointerInfo(),
+      DAG.getStore(St.getChain(), DL, SplatVal, BasePtr, PtrInfo,
                    OrigAlignment, St.getMemOperand()->getFlags());
 
   unsigned Offset = EltOffset;
@@ -8944,7 +8945,7 @@ static SDValue splitStoreSplat(Selection
     SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i64, BasePtr,
                                     DAG.getConstant(Offset, DL, MVT::i64));
     NewST1 = DAG.getStore(NewST1.getValue(0), DL, SplatVal, OffsetPtr,
-                          St.getPointerInfo(), Alignment,
+                          PtrInfo.getWithOffset(Offset), Alignment,
                           St.getMemOperand()->getFlags());
     Offset += EltOffset;
   }