[llvm-branch-commits] [lldb] r311585 - Merging r311579:

Hans Wennborg via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Wed Aug 23 11:41:31 PDT 2017


Author: hans
Date: Wed Aug 23 11:41:31 2017
New Revision: 311585

URL: http://llvm.org/viewvc/llvm-project?rev=311585&view=rev
Log:
Merging r311579:
------------------------------------------------------------------------
r311579 | compnerd | 2017-08-23 10:23:12 -0700 (Wed, 23 Aug 2017) | 6 lines

Process: fix FXSAVE on x86

The FXSAVE member `ftw` (FPU Tag Word) was given the wrong size (8-bit)
instead of the correct width (16-bit) as per the x87 Programmer's
Manual.  Adjust this to ensure that we print out the complete value for
the register.
------------------------------------------------------------------------

Modified:
    lldb/branches/release_50/   (props changed)
    lldb/branches/release_50/packages/Python/lldbsuite/test/functionalities/register/register_command/TestRegisters.py
    lldb/branches/release_50/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp
    lldb/branches/release_50/source/Plugins/Process/Utility/RegisterContext_x86.h

Propchange: lldb/branches/release_50/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Wed Aug 23 11:41:31 2017
@@ -1,3 +1,3 @@
 /lldb/branches/apple/python-GIL:156467-162159
 /lldb/branches/iohandler:198360-200250
-/lldb/trunk:311122,311354-311355
+/lldb/trunk:311122,311354-311355,311579

Modified: lldb/branches/release_50/packages/Python/lldbsuite/test/functionalities/register/register_command/TestRegisters.py
URL: http://llvm.org/viewvc/llvm-project/lldb/branches/release_50/packages/Python/lldbsuite/test/functionalities/register/register_command/TestRegisters.py?rev=311585&r1=311584&r2=311585&view=diff
==============================================================================
--- lldb/branches/release_50/packages/Python/lldbsuite/test/functionalities/register/register_command/TestRegisters.py (original)
+++ lldb/branches/release_50/packages/Python/lldbsuite/test/functionalities/register/register_command/TestRegisters.py Wed Aug 23 11:41:31 2017
@@ -256,7 +256,7 @@ class RegisterCommandsTestCase(TestBase)
             self.expect(
                 "register read ftag", substrs=[
                     'ftag' + ' = ', str(
-                        "0x%0.2x" %
+                        "0x%0.4x" %
                         (reg_value_ftag_initial | (
                             1 << fstat_top_pointer_initial)))])
             reg_value_ftag_initial = reg_value_ftag_initial | (

Modified: lldb/branches/release_50/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/branches/release_50/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp?rev=311585&r1=311584&r2=311585&view=diff
==============================================================================
--- lldb/branches/release_50/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp (original)
+++ lldb/branches/release_50/source/Plugins/Process/Utility/RegisterContextLinux_i386.cpp Wed Aug 23 11:41:31 2017
@@ -36,8 +36,7 @@ struct GPR {
 struct FPR_i386 {
   uint16_t fctrl;     // FPU Control Word (fcw)
   uint16_t fstat;     // FPU Status Word (fsw)
-  uint8_t ftag;       // FPU Tag Word (ftw)
-  uint8_t reserved_1; // Reserved
+  uint16_t ftag;      // FPU Tag Word (ftw)
   uint16_t fop;       // Last Instruction Opcode (fop)
   union {
     struct {

Modified: lldb/branches/release_50/source/Plugins/Process/Utility/RegisterContext_x86.h
URL: http://llvm.org/viewvc/llvm-project/lldb/branches/release_50/source/Plugins/Process/Utility/RegisterContext_x86.h?rev=311585&r1=311584&r2=311585&view=diff
==============================================================================
--- lldb/branches/release_50/source/Plugins/Process/Utility/RegisterContext_x86.h (original)
+++ lldb/branches/release_50/source/Plugins/Process/Utility/RegisterContext_x86.h Wed Aug 23 11:41:31 2017
@@ -257,8 +257,7 @@ struct XMMReg {
 struct FXSAVE {
   uint16_t fctrl;     // FPU Control Word (fcw)
   uint16_t fstat;     // FPU Status Word (fsw)
-  uint8_t ftag;       // FPU Tag Word (ftw)
-  uint8_t reserved_1; // Reserved
+  uint16_t ftag;      // FPU Tag Word (ftw)
   uint16_t fop;       // Last Instruction Opcode (fop)
   union {
     struct {




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