[llvm-branch-commits] [llvm-branch] r300979 - Merging r298604:

[Tom Stellard via llvm-branch-commits]

Author: tstellar
Date: Fri Apr 21 09:14:41 2017
New Revision: 300979

URL: http://llvm.org/viewvc/llvm-project?rev=300979&view=rev
Log:
Merging r298604:

------------------------------------------------------------------------
r298604 | niravd | 2017-03-23 11:01:50 -0400 (Thu, 23 Mar 2017) | 14 lines

[SDAG] Fix zeroExtend assertion error

Move CombineTo preventing deleted node from being returned in
visitZERO_EXTEND.

Fixes PR32284.

Reviewers: RKSimon, bogner

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31254
------------------------------------------------------------------------

Added:
    llvm/branches/release_40/test/CodeGen/X86/pr32284.ll
Modified:
    llvm/branches/release_40/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/branches/release_40/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_40/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=300979&r1=300978&r2=300979&view=diff
==============================================================================
--- llvm/branches/release_40/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/branches/release_40/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Apr 21 09:14:41 2017
@@ -6677,13 +6677,14 @@ SDValue DAGCombiner::visitZERO_EXTEND(SD
                                        LN0->getChain(),
                                        LN0->getBasePtr(), N0.getValueType(),
                                        LN0->getMemOperand());
-      CombineTo(N, ExtLoad);
+
       SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SDLoc(N0),
                                   N0.getValueType(), ExtLoad);
       CombineTo(N0.getNode(), Trunc, ExtLoad.getValue(1));
 
       ExtendSetCCUses(SetCCs, Trunc, ExtLoad, SDLoc(N),
                       ISD::ZERO_EXTEND);
+      CombineTo(N, ExtLoad);
       return SDValue(N, 0);   // Return N so it doesn't get rechecked!
     }
   }

Added: llvm/branches/release_40/test/CodeGen/X86/pr32284.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_40/test/CodeGen/X86/pr32284.ll?rev=300979&view=auto
==============================================================================
--- llvm/branches/release_40/test/CodeGen/X86/pr32284.ll (added)
+++ llvm/branches/release_40/test/CodeGen/X86/pr32284.ll Fri Apr 21 09:14:41 2017
@@ -0,0 +1,32 @@
+; RUN: llc -O0 -mtriple=i686-unknown -mcpu=skx -o - %s
+; RUN: llc -O0 -mtriple=x86_64-unknown -mcpu=skx  -o - %s
+; RUN: llc -mtriple=i686-unknown -mcpu=skx  -o - %s
+; RUN: llc -mtriple=x86_64-unknown -mcpu=skx  -o - %s
+
+ at c = external constant i8, align 1
+
+define void @foo() {
+entry:
+  %a = alloca i8, align 1
+  %b = alloca i32, align 4
+  %0 = load i8, i8* @c, align 1
+  %conv = zext i8 %0 to i32
+  %sub = sub nsw i32 0, %conv
+  %conv1 = sext i32 %sub to i64
+  %sub2 = sub nsw i64 0, %conv1
+  %conv3 = trunc i64 %sub2 to i8
+  %tobool = icmp ne i8 %conv3, 0
+  %frombool = zext i1 %tobool to i8
+  store i8 %frombool, i8* %a, align 1
+  %1 = load i8, i8* @c, align 1
+  %tobool4 = icmp ne i8 %1, 0
+  %lnot = xor i1 %tobool4, true
+  %lnot5 = xor i1 %lnot, true
+  %conv6 = zext i1 %lnot5 to i32
+  %2 = load i8, i8* @c, align 1
+  %conv7 = zext i8 %2 to i32
+  %cmp = icmp sle i32 %conv6, %conv7
+  %conv8 = zext i1 %cmp to i32
+  store i32 %conv8, i32* %b, align 4
+  ret void
+}