[llvm-branch-commits] [llvm-branch] r260156 - Merging r259958:

[Hans Wennborg via llvm-branch-commits]

Author: hans
Date: Mon Feb  8 16:15:55 2016
New Revision: 260156

URL: http://llvm.org/viewvc/llvm-project?rev=260156&view=rev
Log:
Merging r259958:
------------------------------------------------------------------------
r259958 | evandro | 2016-02-05 16:01:41 -0800 (Fri, 05 Feb 2016) | 11 lines

[AArch64] Add the scheduling model for Exynos-M1

Summary:
Add the core scheduling model for the Samsung Exynos-M1 (ARMv8-A).


Reviewers: jmolloy, rengolin, christof, MinSeongKIM, t.p.northover

Subscribers: aemerson, rengolin, MatzeB

Differential Revision: http://reviews.llvm.org/D16644
------------------------------------------------------------------------

Added:
    llvm/branches/release_38/lib/Target/AArch64/AArch64SchedM1.td
      - copied unchanged from r259958, llvm/trunk/lib/Target/AArch64/AArch64SchedM1.td
Modified:
    llvm/branches/release_38/   (props changed)
    llvm/branches/release_38/lib/Target/AArch64/AArch64.td

Propchange: llvm/branches/release_38/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Mon Feb  8 16:15:55 2016
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,257645,257648,257730,257775,257791,257875,257886,257902,257905,257925,257929-257930,257940,257942,257977,257979,257997,258168,258184,258207,258221,258273,258325,258406,258416,258428,258436,258471,258690,258729,258891,258971,259177-259178,259228,259236,259342,259346,259375,259381,259645,259649,259695-259696,259740,259798,259835,259840,259886,259888
+/llvm/trunk:155241,257645,257648,257730,257775,257791,257875,257886,257902,257905,257925,257929-257930,257940,257942,257977,257979,257997,258168,258184,258207,258221,258273,258325,258406,258416,258428,258436,258471,258690,258729,258891,258971,259177-259178,259228,259236,259342,259346,259375,259381,259645,259649,259695-259696,259740,259798,259835,259840,259886,259888,259958

Modified: llvm/branches/release_38/lib/Target/AArch64/AArch64.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AArch64/AArch64.td?rev=260156&r1=260155&r2=260156&view=diff
==============================================================================
--- llvm/branches/release_38/lib/Target/AArch64/AArch64.td (original)
+++ llvm/branches/release_38/lib/Target/AArch64/AArch64.td Mon Feb  8 16:15:55 2016
@@ -90,6 +90,7 @@ def AArch64InstrInfo : InstrInfo;
 include "AArch64SchedA53.td"
 include "AArch64SchedA57.td"
 include "AArch64SchedCyclone.td"
+include "AArch64SchedM1.td"
 
 def ProcA35     : SubtargetFeature<"a35", "ARMProcFamily", "CortexA35",
                                    "Cortex-A35 ARM processors",
@@ -144,8 +145,7 @@ def : ProcessorModel<"cortex-a57", Corte
 // FIXME: Cortex-A72 is currently modelled as an Cortex-A57.
 def : ProcessorModel<"cortex-a72", CortexA57Model, [ProcA57]>;
 def : ProcessorModel<"cyclone", CycloneModel, [ProcCyclone]>;
-// FIXME: Exynos-M1 is currently modelled without a specific SchedModel.
-def : ProcessorModel<"exynos-m1", NoSchedModel, [ProcExynosM1]>;
+def : ProcessorModel<"exynos-m1", ExynosM1Model, [ProcExynosM1]>;
 
 //===----------------------------------------------------------------------===//
 // Assembly parser