[llvm-branch-commits] [llvm-branch] r232118 - [release_36] Cherry-pick r232085.

[Quentin Colombet]

Author: qcolombet
Date: Thu Mar 12 17:53:04 2015
New Revision: 232118

URL: http://llvm.org/viewvc/llvm-project?rev=232118&view=rev
Log:
[release_36] Cherry-pick r232085.

Original commit message:
[X86] Fix a regression introduced by r223641.
The permps and permd instructions have their operands swapped compared to the
intrinsic definition. Therefore, they do not fall into the INTR_TYPE_2OP
category.

I did not create a new category for those two, as they are the only one AFAICT
in that case.

<rdar://problem/20108262>

Modified:
    llvm/branches/release_36/   (props changed)
    llvm/branches/release_36/lib/Target/X86/X86ISelLowering.cpp
    llvm/branches/release_36/lib/Target/X86/X86IntrinsicsInfo.h
    llvm/branches/release_36/test/CodeGen/X86/avx2-intrinsics-x86.ll

Propchange: llvm/branches/release_36/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Thu Mar 12 17:53:04 2015
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,226023,226029,226044,226046,226048,226058,226075,226170-226171,226182,226473,226588,226616,226664,226708,226711,226755,226791,226808-226809,227005,227085,227087,227089,227250,227260-227261,227290,227294,227299,227319,227339,227491,227584,227603,227628,227670,227809,227815,227903,227934,227972,227983,228049,228129,228168,228331,228411,228444,228490,228500,228507,228518,228525,228565,228656,228760-228761,228793,228842,228899,228957,228969,228979,229029,229343,229351-229352,229421,229495,229529,229731,229911,230058,231563
+/llvm/trunk:155241,226023,226029,226044,226046,226048,226058,226075,226170-226171,226182,226473,226588,226616,226664,226708,226711,226755,226791,226808-226809,227005,227085,227087,227089,227250,227260-227261,227290,227294,227299,227319,227339,227491,227584,227603,227628,227670,227809,227815,227903,227934,227972,227983,228049,228129,228168,228331,228411,228444,228490,228500,228507,228518,228525,228565,228656,228760-228761,228793,228842,228899,228957,228969,228979,229029,229343,229351-229352,229421,229495,229529,229731,229911,230058,231563,232085

Modified: llvm/branches/release_36/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/lib/Target/X86/X86ISelLowering.cpp?rev=232118&r1=232117&r2=232118&view=diff
==============================================================================
--- llvm/branches/release_36/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/release_36/lib/Target/X86/X86ISelLowering.cpp Thu Mar 12 17:53:04 2015
@@ -17172,6 +17172,13 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S
   switch (IntNo) {
   default: return SDValue();    // Don't custom lower most intrinsics.
 
+  case Intrinsic::x86_avx2_permd:
+  case Intrinsic::x86_avx2_permps:
+    // Operands intentionally swapped. Mask is last operand to intrinsic,
+    // but second operand for node/instruction.
+    return DAG.getNode(X86ISD::VPERMV, dl, Op.getValueType(),
+                       Op.getOperand(2), Op.getOperand(1));
+
   case Intrinsic::x86_avx512_mask_valign_q_512:
   case Intrinsic::x86_avx512_mask_valign_d_512:
     // Vector source operands are swapped.

Modified: llvm/branches/release_36/lib/Target/X86/X86IntrinsicsInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/lib/Target/X86/X86IntrinsicsInfo.h?rev=232118&r1=232117&r2=232118&view=diff
==============================================================================
--- llvm/branches/release_36/lib/Target/X86/X86IntrinsicsInfo.h (original)
+++ llvm/branches/release_36/lib/Target/X86/X86IntrinsicsInfo.h Thu Mar 12 17:53:04 2015
@@ -175,8 +175,6 @@ static const IntrinsicData  IntrinsicsWi
   X86_INTRINSIC_DATA(avx2_packsswb,     INTR_TYPE_2OP, X86ISD::PACKSS, 0),
   X86_INTRINSIC_DATA(avx2_packusdw,     INTR_TYPE_2OP, X86ISD::PACKUS, 0),
   X86_INTRINSIC_DATA(avx2_packuswb,     INTR_TYPE_2OP, X86ISD::PACKUS, 0),
-  X86_INTRINSIC_DATA(avx2_permd,        INTR_TYPE_2OP, X86ISD::VPERMV, 0),
-  X86_INTRINSIC_DATA(avx2_permps,       INTR_TYPE_2OP, X86ISD::VPERMV, 0),
   X86_INTRINSIC_DATA(avx2_phadd_d,      INTR_TYPE_2OP, X86ISD::HADD, 0),
   X86_INTRINSIC_DATA(avx2_phadd_w,      INTR_TYPE_2OP, X86ISD::HADD, 0),
   X86_INTRINSIC_DATA(avx2_phsub_d,      INTR_TYPE_2OP, X86ISD::HSUB, 0),

Modified: llvm/branches/release_36/test/CodeGen/X86/avx2-intrinsics-x86.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/test/CodeGen/X86/avx2-intrinsics-x86.ll?rev=232118&r1=232117&r2=232118&view=diff
==============================================================================
--- llvm/branches/release_36/test/CodeGen/X86/avx2-intrinsics-x86.ll (original)
+++ llvm/branches/release_36/test/CodeGen/X86/avx2-intrinsics-x86.ll Thu Mar 12 17:53:04 2015
@@ -785,7 +785,10 @@ declare <4 x i64> @llvm.x86.avx2.pbroadc
 
 
 define <8 x i32> @test_x86_avx2_permd(<8 x i32> %a0, <8 x i32> %a1) {
-  ; CHECK: vpermd
+  ; Check that the arguments are swapped between the intrinsic definition
+  ; and its lowering. Indeed, the offsets are the first source in
+  ; the instruction.
+  ; CHECK: vpermd %ymm0, %ymm1, %ymm0
   %res = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1]
   ret <8 x i32> %res
 }
@@ -793,7 +796,10 @@ declare <8 x i32> @llvm.x86.avx2.permd(<
 
 
 define <8 x float> @test_x86_avx2_permps(<8 x float> %a0, <8 x float> %a1) {
-  ; CHECK: vpermps
+  ; Check that the arguments are swapped between the intrinsic definition
+  ; and its lowering. Indeed, the offsets are the first source in
+  ; the instruction.
+  ; CHECK: vpermps %ymm0, %ymm1, %ymm0
   %res = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x float> %a1) ; <<8 x float>> [#uses=1]
   ret <8 x float> %res
 }