[llvm-branch-commits] [llvm-branch] r226724 - Merging r226585:

[Tom Stellard]

Author: tstellar
Date: Wed Jan 21 16:44:46 2015
New Revision: 226724

URL: http://llvm.org/viewvc/llvm-project?rev=226724&view=rev
Log:
Merging r226585:

------------------------------------------------------------------------
r226585 | thomas.stellard | 2015-01-20 12:49:45 -0500 (Tue, 20 Jan 2015) | 5 lines

R600/SI: Add kill flag when copying scratch offset to a register

This allows us to re-use the same register for the scratch offset
when accessing large private arrays.

------------------------------------------------------------------------

Modified:
    llvm/branches/release_36/lib/Target/R600/SIRegisterInfo.cpp
    llvm/branches/release_36/test/CodeGen/R600/scratch-buffer.ll

Modified: llvm/branches/release_36/lib/Target/R600/SIRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/lib/Target/R600/SIRegisterInfo.cpp?rev=226724&r1=226723&r2=226724&view=diff
==============================================================================
--- llvm/branches/release_36/lib/Target/R600/SIRegisterInfo.cpp (original)
+++ llvm/branches/release_36/lib/Target/R600/SIRegisterInfo.cpp Wed Jan 21 16:44:46 2015
@@ -289,7 +289,7 @@ void SIRegisterInfo::eliminateFrameIndex
         BuildMI(*MBB, MI, MI->getDebugLoc(),
                 TII->get(AMDGPU::V_MOV_B32_e32), TmpReg)
                 .addImm(Offset);
-        FIOp.ChangeToRegister(TmpReg, false);
+        FIOp.ChangeToRegister(TmpReg, false, false, true);
       }
     }
   }

Modified: llvm/branches/release_36/test/CodeGen/R600/scratch-buffer.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/test/CodeGen/R600/scratch-buffer.ll?rev=226724&r1=226723&r2=226724&view=diff
==============================================================================
--- llvm/branches/release_36/test/CodeGen/R600/scratch-buffer.ll (original)
+++ llvm/branches/release_36/test/CodeGen/R600/scratch-buffer.ll Wed Jan 21 16:44:46 2015
@@ -3,9 +3,14 @@
 ; When a frame index offset is more than 12-bits, make sure we don't store
 ; it in mubuf's offset field.
 
+; Also, make sure we use the same register for storing the scratch buffer addresss
+; for both stores. This register is allocated by the register scavenger, so we
+; should be able to reuse the same regiser for each scratch buffer access.
+
 ; CHECK-LABEL: {{^}}legal_offset_fi:
-; CHECK: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen
-; CHECK: v_mov_b32_e32 [[OFFSET:v[0-9]+]], 0x8000
+; CHECK: v_mov_b32_e32 [[OFFSET:v[0-9]+]], 0{{$}}
+; CHECK: buffer_store_dword v{{[0-9]+}}, [[OFFSET]], s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen
+; CHECK: v_mov_b32_e32 [[OFFSET]], 0x8000
 ; CHECK: buffer_store_dword v{{[0-9]+}}, [[OFFSET]], s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen{{$}}
 
 define void @legal_offset_fi(i32 addrspace(1)* %out, i32 %cond, i32 %if_offset, i32 %else_offset) {