[llvm-branch-commits] [llvm-branch] r226722 - Merging r226583:

[Tom Stellard]

Author: tstellar
Date: Wed Jan 21 16:44:44 2015
New Revision: 226722

URL: http://llvm.org/viewvc/llvm-project?rev=226722&view=rev
Log:
Merging r226583:

------------------------------------------------------------------------
r226583 | thomas.stellard | 2015-01-20 12:49:41 -0500 (Tue, 20 Jan 2015) | 5 lines

R600/SI: Update SIInstrInfo:verifyInstruction() after r225662

Now that we have our own custom register operand types, we need
to handle them in the verifiier.

------------------------------------------------------------------------

Modified:
    llvm/branches/release_36/lib/Target/R600/SIInstrInfo.cpp

Modified: llvm/branches/release_36/lib/Target/R600/SIInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/lib/Target/R600/SIInstrInfo.cpp?rev=226722&r1=226721&r2=226722&view=diff
==============================================================================
--- llvm/branches/release_36/lib/Target/R600/SIInstrInfo.cpp (original)
+++ llvm/branches/release_36/lib/Target/R600/SIInstrInfo.cpp Wed Jan 21 16:44:44 2015
@@ -1130,12 +1130,18 @@ bool SIInstrInfo::verifyInstruction(cons
     }
 
     switch (Desc.OpInfo[i].OperandType) {
-    case MCOI::OPERAND_REGISTER: {
-      if (MI->getOperand(i).isImm() &&
-          !isImmOperandLegal(MI, i, MI->getOperand(i))) {
-          ErrInfo = "Illegal immediate value for operand.";
-          return false;
-        }
+    case MCOI::OPERAND_REGISTER:
+      if (MI->getOperand(i).isImm() || MI->getOperand(i).isFPImm()) {
+        ErrInfo = "Illegal immediate value for operand.";
+        return false;
+      }
+      break;
+    case AMDGPU::OPERAND_REG_IMM32:
+      break;
+    case AMDGPU::OPERAND_REG_INLINE_C:
+      if (MI->getOperand(i).isImm() && !isInlineConstant(MI->getOperand(i))) {
+        ErrInfo = "Illegal immediate value for operand.";
+        return false;
       }
       break;
     case MCOI::OPERAND_IMMEDIATE: