[llvm-branch-commits] [llvm-branch] r236066 - Merging r233409:
Tom Stellard
thomas.stellard at amd.com
Tue Apr 28 17:41:53 PDT 2015
Author: tstellar
Date: Tue Apr 28 19:41:53 2015
New Revision: 236066
URL: http://llvm.org/viewvc/llvm-project?rev=236066&view=rev
Log:
Merging r233409:
------------------------------------------------------------------------
r233409 | ahmed.bougacha | 2015-03-27 16:28:30 -0400 (Fri, 27 Mar 2015) | 7 lines
[CodeGen] Don't attempt a tail-call with implicit sret.
Tailcalls are only OK with forwarded sret pointers. With sret demotion,
they're not, as we'd have a pointer into a soon-to-be-dead stack frame.
Differential Revison: http://reviews.llvm.org/D8510
------------------------------------------------------------------------
Added:
llvm/branches/release_36/test/CodeGen/AArch64/tailcall-implicit-sret.ll
Modified:
llvm/branches/release_36/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Modified: llvm/branches/release_36/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=236066&r1=236065&r2=236066&view=diff
==============================================================================
--- llvm/branches/release_36/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/branches/release_36/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Tue Apr 28 19:41:53 2015
@@ -7353,6 +7353,10 @@ TargetLowering::LowerCallTo(TargetLoweri
Entry.Alignment = Align;
CLI.getArgs().insert(CLI.getArgs().begin(), Entry);
CLI.RetTy = Type::getVoidTy(CLI.RetTy->getContext());
+
+ // sret demotion isn't compatible with tail-calls, since the sret argument
+ // points into the callers stack frame.
+ CLI.IsTailCall = false;
} else {
for (unsigned I = 0, E = RetTys.size(); I != E; ++I) {
EVT VT = RetTys[I];
Added: llvm/branches/release_36/test/CodeGen/AArch64/tailcall-implicit-sret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/test/CodeGen/AArch64/tailcall-implicit-sret.ll?rev=236066&view=auto
==============================================================================
--- llvm/branches/release_36/test/CodeGen/AArch64/tailcall-implicit-sret.ll (added)
+++ llvm/branches/release_36/test/CodeGen/AArch64/tailcall-implicit-sret.ll Tue Apr 28 19:41:53 2015
@@ -0,0 +1,46 @@
+; RUN: llc < %s -mtriple arm64-apple-darwin -aarch64-load-store-opt=false -asm-verbose=false | FileCheck %s
+; Disable the load/store optimizer to avoid having LDP/STPs and simplify checks.
+
+target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+
+; Check that we don't try to tail-call with an sret-demoted return.
+
+declare i1024 @test_sret() #0
+
+; CHECK-LABEL: _test_call_sret:
+; CHECK: mov x[[CALLERX8NUM:[0-9]+]], x8
+; CHECK: mov x8, sp
+; CHECK-NEXT: bl _test_sret
+; CHECK-NEXT: ldr [[CALLERSRET1:x[0-9]+]], [sp]
+; CHECK: str [[CALLERSRET1:x[0-9]+]], [x[[CALLERX8NUM]]]
+; CHECK: ret
+define i1024 @test_call_sret() #0 {
+ %a = call i1024 @test_sret()
+ ret i1024 %a
+}
+
+; CHECK-LABEL: _test_tailcall_sret:
+; CHECK: mov x[[CALLERX8NUM:[0-9]+]], x8
+; CHECK: mov x8, sp
+; CHECK-NEXT: bl _test_sret
+; CHECK-NEXT: ldr [[CALLERSRET1:x[0-9]+]], [sp]
+; CHECK: str [[CALLERSRET1:x[0-9]+]], [x[[CALLERX8NUM]]]
+; CHECK: ret
+define i1024 @test_tailcall_sret() #0 {
+ %a = tail call i1024 @test_sret()
+ ret i1024 %a
+}
+
+; CHECK-LABEL: _test_indirect_tailcall_sret:
+; CHECK: mov x[[CALLERX8NUM:[0-9]+]], x8
+; CHECK: mov x8, sp
+; CHECK-NEXT: blr x0
+; CHECK-NEXT: ldr [[CALLERSRET1:x[0-9]+]], [sp]
+; CHECK: str [[CALLERSRET1:x[0-9]+]], [x[[CALLERX8NUM]]]
+; CHECK: ret
+define i1024 @test_indirect_tailcall_sret(i1024 ()* %f) #0 {
+ %a = tail call i1024 %f()
+ ret i1024 %a
+}
+
+attributes #0 = { nounwind }
More information about the llvm-branch-commits
mailing list